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Intel Revs Up Itanium Roadmap for 2004 and 2005 by Timothy Prickett Morgan Worried that its 64-bit Itanium roadmap is falling behind competitive RISC processors from IBM, Sun Microsystems, and Hewlett-Packard, Intel last week made some substantial changes to the Itanium roadmap that will see more powerful chips hit the streets earlier than planned. But the larger cache "Madison" Itaniums and dual-core "Montecito" Itaniums that Intel has added to its roadmap will not be available until 2004 and 2005, so don't get too excited.
Intel intentionally leaked out some of the details of the new processors late last week, ahead of its Intel Developer Forum conference, scheduled for February 18 through 21 in San Jose, California. Madison and its low-power, low-cache offshoot, "Deerfield," had long been expected in 2003, and Montecito, its follow-on, had been on the roadmap for 2004. That has now been changed. Madison is expected to run at between 1.3 GHz and 1.5 GHz, and to deliver a 30 to 50 percent performance boost over the McKinley chip; it will also offer up to 6 MB of on-chip L3 cache memory, which is twice the amount on the fastest McKinley. Madison is based on a 0.13 micron process, one that has been recently perfected by Intel. Madison replaces the 900 MHz and 1 GHz "McKinley" Itanium 2 processor, which offered 1.5 MB or 3 MB of on-chip L3 cache and was created using a 0.18 micron process. Intel's original roadmap said that Montecito would be the first Itanium chip built using a 90 nanometer process, and that Montecito would be a single-core processor, like the Merced, McKinley, Madison, and Deerfield Itanium chips before it. Intel had not planned to bring out dual-core Itanium processors--meaning chips that pack two whole processor cores onto a single chip, making it, in effect, a baby symmetric multiprocessor server, or what I like to call a "double-wide" processor--until 2006, with the "Chivano" Itaniums. IBM has been shipping dual-core Power4 processors running at 1 GHz or higher since October 2001, HP will ship a dual-core PA-8800 processor running at 1 GHz or higher in the second half of this year, and Sun will also ship a dual-core UltraSparc-IV processor running at around 1.2 GHz later in 2003. Dual-core processors, especially those that are slot-compatible with prior generations of single-core designs, are all the rage, because they allow a server maker to effectively double the processing capacity on their servers without having to rearchitect them significantly. Intel has got to keep up with these chips to steal away RISC/Unix and RISC/Linux business, and that is the main reason why the Montecito Itanium has been pushed out to 2005 but implemented as a dual-core Itanium. Intel has hedged a bit on whether the dual-core Montecito will drop right into machines that use McKinley or Madison processors, but what is clear is that, if it doesn't do this, it may as well not bother, as far as server makers and their customers are concerned. The dual-core Montecito chip will be made using a 90 nanometer process, as planned, and Intel wants people to believe that there has been no slippage in the roll-out of the 90 nanometer process that is pushing Montecito from 2004 to 2005. The time, it seems, is needed to create a dual-core chip out of a single-core chip. My guess is that it is a little of both. If Intel launches other chips using 90 nanometer processes in high-volume chips, we will know for sure if Intel is stretching the truth here. HP's desperation to keep pace with IBM's Power processors has lead it to create dual-processor Madison modules, which it will launch in early 2004, and which will allow two Madisons to plug into a single Madison slot. HP had been planning to offer dual-processor Montecito modules, and now it won't have to. But it may have to offer dual-processor Madison-II modules, since that is the fastest chip that will be available in 2004 in the Itanium line. All HP knows is that it is creating a single server line to run HP-UX, Linux, Windows, and OpenVMS, and that platform is based on single-core Itanium chips that do not offer the performance it needs to compete against IBM and Sun. Intel is not providing any specs on dual-core Montecito, but to be useful it will have to offer more performance than two of the then-current Madisons. By this time, IBM will be shipping Power5 processors in the 2 GHz to 3 GHz range. Intel has to come close to this performance level, or beat it. Hewlett-Packard is counting on this, in fact. In lieu of the single-core Montecito during 2004, Intel plans to launch a Madison-II processor, based on a 0.13 micron process, like the original Madison chip, that will include 9 MB of on-chip L3 cache and will have its clock speed ramped up to above 1.5 GHz. Intel isn't saying how much it intends to increase clock speeds, but 1.7 GHz to 2 GHz is possible, and 2 GHz is the obvious target to supply a chip in 2004 that is about 30 percent more powerful than the original Madison chip from 2003.
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