Guild Companies

Advanced Micro Devices, the chip maker who is the upstart rival to Intel in that company's own 32-bit Pentium and 64-bit Itanium processor market, quietly announced a revised roadmap for its future 32-bit and 64-bit X86 processors. The AMD delays affect a future 64-bit desktop chip, code-named "ClawHammer" and sold as the Opteron DP, and a future 32-bit server and workstation chip, code-named "Barton" and sold as the Athlon MP. The roadmap for the initial 64-bit "SledgeHammer" Opteron MP chip is unchanged, but more powerful SledgeHammers may have been pushed out.

As the current roadmap stands, the Barton MP chip will be based on a 0.13 micron chip process that allows AMD to cram 128 KB of L1 cache and 512 KB of L2 cache memory on the chip. The initial Barton chips were expected to run at around 1.8 GHz and make their debut before the end of the year with a faster 2 GHz version expected during the first quarter of 2003. AMD is adding a dual-pumped 333 MHz processor bus to the chip, and it is now promising to ship the Barton chips during the first half of 2003, with the hopes of doing so as early in the year as possible. A desktop version of the Barton chip sold under the Athlon XP brand for desktop PCs could start shipping early in 2003 and will probably come out ahead of the Athlon MP server and workstation version of the chip.

AMD had hoped to get the ClawHammer chip to market sometime in the fourth quarter of 2002, but it is now promising to get the chip, which works in two-way capable machines, to market sometime in the first half of 2003. All of the Hammer family of processors are based on a clone of Intel's 32-bit X86 architecture used in Pentium processors, but they have had their architecture extended to 64-bit without moving to the Itanium EPIC instruction set.

The ClawHammer DP chips, which will be made using a 0.13 micron silicon-on-insulator process, are expected to run at 1.6 GHz to 2.4 GHz, but those chip speeds are subject to change as AMD ramps up the manufacturing process. During the second half of 2003, AMD is expected to make a shrink of the ClawHammer chip for uniprocessors using a 0.09 micron SOI process and crank the clock speed of the chips up to around 2.7 GHz to 2.8 GHz.

The roadmap for the initial SledgeHammer chips is at the moment unchanged, with AMD expecting to launch these 64-bit chips, aimed at servers using from two to eight processors in an SMP configuration, during the first half of 2003 running at around 2.4 GHz or 2.5 GHz. The SledgeHammer processors are expected to have 128 KB of L1 cache and an option of 512 KB or 1 MB of L2 cache and will be made using the 0.13 micron SOI process used for the initial ClawHammers. A faster SledgeHammer chip using the 0.09 micron SOI process and expected to run at 2.7 GHz to 2.8 GHz and possibly with much larger L2 and L3 caches that was expected during the second half of 2003 is not on the AMD roadmap announced last week.

The SledgeHammer chip is expected to have a quad-pumped 666 MHz memory bus that has twice the bandwidth of the 333 MHz dual-pumped bus used in the Althon line with the Barton chips and used in the Hammer line with the ClawHammers.