Guild Companies

Hewlett-Packard is by far the staunchest supporter of the 64-bit Itanium chip, aside from Intel, and it has staked the future of its enterprise server business to a large extent to Itanium. But Itanium is, as we all know, running late and underperforming compared to plan. HP has an innovative fix for this, the company divulged last week: It is going to plug two Itanium chips into a single CPU slot in its servers.

Dual-core processors for RISC/Unix servers are in the works for HP already (the PA-8800 is essentially two PA-8700s on a single die with a shared cache), rival Sun Microsystems is working on a dual-core UltraSparc-IV, and IBM has been shipping the dual-core Power4 RISC chip in its Unix-based pSeries line for nearly a year and in its OS/400-based iSeries line since August. These vendors are putting two cores on a chip with shared cache gluing them together so they can double the number of processors they can support in a server frame and boost online transaction processing (OLTP) scalability by 60 percent or more. As chip making processes continue to make finer wires for chip transistors, it is easier to put two cores on a single chip and link them right on the silicon than it is to use external caches and glue chips to accomplish the same task. However, Intel is not expected to create dual-core Itanium processors until the "Chivano" generation in the middle of 2005 or so. HP, which wants to shift to the Itanium architecture in its Unix, Windows, and Linux enterprise servers, needs to offer better performance than the current 1 GHz McKinley or future 1.3 GHz "Madison" Itanium chip (due in mid-2003) can offer. Heaven can wait, but HP can't.

The answer that HP has come up with is to create a processor module that consists of two Itanium processors linked by a shared cache memory that is packaged in such a way that it can plug into an existing Itanium slot. That means that HP doesn't have to wait for the Chivano Itanium. But customers are going to have to wait quite a while to see these dual-processor Itanium modules hit the streets.

The first two-processor HP modules will come out sometime in the first half of 2004, and they will be based on the Madison Itaniums. By our estimates, these two-processor Itanium modules (which are as yet unnamed by HP) will be available approximately six to nine months after the Madisons are in volume production, provided everything goes well at Intel's fabs. That's a long time to get these into production, but HP has to do a lot of certification and testing before it can roll them out into its machines. Not too long after that, Intel is expected to roll out the "Montecito" Itaniums, perhaps in mid-2004, and by the end of 2004, HP expects to have a dual-processor Montecito module available for its server customers. Another six to nine months later, the Chivano chips will be available, so in theory HP won't need dual-processor modules any more, but then again, it could package two of these dual-core chips in a frame and get up to 256-way symmetric multiprocessing (SMP). We'll see what HP does.

Sources at HP say that the company has no intention of sharing the intellectual property it has created to make the dual-processor Madison and Montecito Itanium modules with Intel or any of its server competitors, but that won't stop HP's competitors from trying if they think it is a good idea. IBM has some of the best chip packaging skills in the world (HP uses IBM as its PA-8700 and PA-8800 foundry, for instance) and could figure out a way to mimic what HP is doing. And a company like Dell could afford to pay to develop dual-processor modules for 32-bit Xeon processors if it needed to expand the scalability of its PowerEdge line. If this is a good idea, you can bet other companies will adopt it.