The Four Hundred

The code name of the future Power5 servers from IBM was changed some time in the past few weeks. "Armada" servers, kickers to the current "Regatta" Power4-based machines sold in the iSeries line, are now being called the "Squadron" family of servers. At PartnerWorld in New Orleans two weeks ago, Bill Zeitler, the executive in charge of IBM's Systems Group, said the Power5 machines will offer four times the performance of the current Regatta boxes.

This confirms rumors we had been hearing two months ago. Zeitler's comments on the future performance of the Power5 Squadron servers are peculiar for two reasons. First, it was not (according to our sources) part of his keynote speech, but rather an aside he went into, clearly because it was on his mind. Zeitler has no great love for Sun Microsystems or Hewlett-Packard, and he knew both vendors would be within days of telling their customers and partners about their future server roadmaps, which include monster servers in the same power class as the Squadron machines. But, perhaps more significant, Zeitler's comments effectively commit IBM to reaching this performance level. It's like Babe Ruth pointing to the upper decks in Yankee Stadium. IBM now has to tear the leather off the ball.

Lucky for Zeitler, the initial tests on the Power5 processors, according to sources, indicate that this level of performance improvement is possible. But the same sources caution that the increase in processing power is not based on the TPC-C online transaction processing benchmark; it is not, therefore, based on the CPW variant of that test for the iSeries OS/400 servers or the rPerf variant of it for the pSeries Unix servers, both of which are used for capacity planning on these two respective lines. Because the Power5 chips will support simultaneous multithreading--which it calls Chip MultiThreading, or CMT--to boost the performance of multithreaded applications, whatever benchmark tests IBM is running to give it that quadrupling in performance is probably based on a set of databases, middleware, and programming languages that exploit multithreading within a single processor core and across processors in a tight SMP single-system image.

This means the rumor I heard a few months ago about IBM being able to hit two million transactions per minute (TPM) on the TPC-C test (see the January 13 issue of this newsletter ) got the quadrupling factor more or less right, but the benchmark test wrong. Quite frankly, on boxes with such large memories, TPC-C is probably not the best scaling or performance indictor these days, much as TPC-A and TPC-C outlasted their usefulness once companies could load the whole test in main memory and not really stress the I/O systems in their machines.

While Zeitler said that the Power5 servers would offer four times the oomph of the current Regatta machines, what he obviously intended to say--just so we are precise--is that a 64-way Squadron server using 2 GHz or faster dual-core Power5 processors with 1.9 MB of on chip shared L2 cache and support for CMT would have four times the performance of a 32-way Regatta-H server using 1.3 GHz dual-core Power4 processors with 1.44 MB of L2 cache and no CMT support. The exact nature of the support for multithreading in OS/400 and AIX is uncertain, although both have had such support for some time; furthermore, how CMT will affect actual user applications is entirely unclear. OS/400 V5R3 and AIX 5L Version 5.3 will certainly have much-improved support for CMT. But how customers will implement it and what code or database changes might be necessary to take advantage of it are unknown.

What IBM is obviously worried about, of course, is HP's future "Pinnacles" servers, which will support 64 of either Intel's 1.5 GHz Itanium 2 "Madison" single-core processors or HP's own dual-core 1 GHz or faster PA-8800 "Mako" processors. The Itanium versions of the future Pinnacles server will come out in the early summer with the Madison launch from Intel, and could hit 600,000 TPM with 64 Madisons on the TPC-C test; and the 128-way versions using the PA-8800 processors could easily crest above 1 million TPM on the TPC-C test when they ship, sometime around September 2003. IBM's Regatta-H boxes are topped out at 427,760 in the pSeries line right now, and even if IBM does throw the 1.45 GHz Power4+ processors into the Regatta-H frames and double main memory to 512 GB in the box, it will only get about a 10 percent performance boost. HP is going to be the benchmark leader with a server that supports either Itanium or PA-RISC processors and with Windows, Linux, or HP-UX Unix environments, and there is nothing IBM can do about it until the spring of 2004, when the Squadron machines are set to fly. (I've heard second quarter 2004, with a possibility in April, but nothing more precise.)

This, as you might imagine, is making IBM antsy and will increasingly cause its top brass to talk about the products that Big Blue will deliver in the future, particularly in the Power line of servers. Making promises about unannounced products is the oldest marketing trick in the IT industry. HP is doing it with its Pinnacles machines right now, and Sun did it last week at its analyst conference, talking about what look like very interesting radical CMT machines--which, of course, will not be available until 2005 or 2006. It's the battle of the non-existing servers with these three companies right now. It's interesting, but it will be more interesting when these boxes are out there, showing off their stuff.

As far as the Power5 goes, a month ago test chips in IBM's labs booted up and ran various assembly language tests, which were the basis of Zeitler's comments. By the end of March, my sources tell me, IBM will boot up AIX and Linux on the processor, and it is hard to imagine that OS/400 will not be loaded on the chip for testing within the same time frame. From there, IBM will finish its server designs and begin transforming the Squadrons from prototype servers to machines that will come out of its factories bearing the iSeries and pSeries monikers. The Squadron machines will certainly come out with pSeries labels, running AIX or Linux, in the second quarter of 2004, but it is unclear when the iSeries machines, which will support OS/400, AIX, and Linux at the same time natively on the Squadron box, will be released. It could be at the same time in 2004 or later. That iSeries Squadron launch date will depend on what's going on in IBM's chip plants and server factories, in the midrange market, and in the economy at large.

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