IBM and Chip Partners Plot Course for 28 Nanometer Designs

Published: April 20, 2009

by Timothy Prickett Morgan

IBM and the chip partners it has rounded up to share the burden of creating future chip manufacturing processes announced last week that they have nailed down the technologies that they will roll up to comprise their 28 nanometer chip making processes.

In the current Power6 family of chips, IBM is using a relatively new 65 nanometer process, which will probably also be used with the Power6+ chips expected sometime this year (and hopefully sooner rather than later). IBM is fixing to shift to a 45 nanometer process with the Power7 generation of chips, due in 2010. So that probably puts the 28 nanometer processes IBM announced last week in the Power8 generation sometime around 2012 or 2013, if IBM uses a 32 nanometer process with Power7+ chips. The company has not been specific about is plans. But it has done a lot of work on 32 nanometer processes and will want to recoup on it some how.

IBM's partners in the effort include Chartered Semiconductor Manufacturing, Global Foundries (the chip making spinout from Advanced Micro Devices, Infineon Technologies, Samsung Electronics, and STMicroelectronics, none of whom who can solely afford to do the research into chip making to shrink circuitry all by their lonesome. (Unlike Intel, which is the only chip maker that can afford to go it alone thanks to its monopoly for PC and server chips.)

In the announcement last week, IBM and its partners said that they have defined and are now jointly developing a 28 nanometer high-k metal gate (HKMG) process for low-power bulk CMOS chip technologies. IBM and its partners had already been working on a low-power 32 nanometer processes based on the HKMG processes.

Intel, of course, has already rolled out HKMG processes in its current 45 nanometer chip processes, and is expected to push ahead with 32 nanometer processes this year with its desktop and server chips. The high-k technology Intel is using today, which dopes transistors with hafnium, boosts transistor switching speeds by 20 percent over 65 nanometer processes and the metal gating reduces gate leakage (the loss of ) by a factor of 10. Just like Intel figure out the copper wire trick IBM invented for the power chips, IBM and its partners have figured out the hafnium trick invented by Intel.

The good news for IBM and its chip manufacturing partners is that the new 28 nanometer process is compatible with the 32 nanometer processes already in development (but not yet deployed by IBM for its own Power chips). So any chip design made using the 32 nanometer processes can be shifted to the 28 nanometer processes. IBM says that according to preliminary tests, compared to a 45 nanometer design, the 28 nanometer process will allow companies to cut the size of a chip in half, but deliver chips that have 40 percent more performance and while consuming 20 percent less power. That probably gives the 32 nanometer HKMG processes a pretty short life.

IBM said that it offered an evaluation kit for the 28 nanometer processes to selected clients in December, with broader testing in March. The company expects early production of using the processes in the second half of 2010. And if I had to guess, I would say Power7+ and a whole lot of other game console chips will jump the 32 nanometer step entirely. IBM can't afford to be two generations behind Intel. It is bad enough to be one lap behind.

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