IBM Grows Chips Like Snowflakes Using Natural Processes

Published: May 7, 2007

by Timothy Prickett Morgan

One of the dreams of the nanotechnology revolution is to harness natural forces and processes to create self-manufacturing products. (This is also, as it turns out, one of the nightmares that people have about nanotechnology.) Last week, IBM said that it has figured out a way to create a chip made from vacuum-insulated nanowires, and had manufactured the chip using processes nicked from Nature.

The process that IBM has created for the Airgap Microprocessor emulates the same self-assembling processes that are used to create seashells, the enamel layer on our teeth, and snowflakes, according to Big Blue. As is typical in the IT racket, the term "airgap" is a misnomer, since the wires are not surrounded by air at all, but a vacuum, which as it turns out is the ultimate insulator against wire capacitance. In silicon-based transistors, the electronic (rather than insulating) wires of the chip create heat as they induce fields in each other, which means circuits have to run cooler. To fight capacitance, chip makers have cranked up the power they push through chips, which makes them hotter, too. By switching to vacuum insulation, IBM will be able to send less power through the wires in its chips, and that means they can shrink even further. According to IBM's tests, electrical signals in the Airgap Microprocessor can move 35 percent faster or using 15 percent less heat, depending on what the chip designer wants.

The self-assembling process, which is separate from the vacuum insulation idea, will allow IBM to continue to make copper wires on its chips progressively smaller; in fact, the process can make wires a lot smaller that current lithographic methods allow. The technique that IBM has developed skips the masking and etching steps used in normal chip making processes. (Basically, you take a picture of the chip you want onto the wafer, and use chemicals to cut out and build up wires and insulators.) With this new process, IBM lays down the copper wires for the chip, pours a mystery polymer concoction onto a 300 mm silicon wafer, then bakes it in an oven. This process creates trillions of 20-nanometer areas that are filled with carbon silicate glass on top of the wafer, and then IBM removes the glass to create the vacuum insulation.

IBM says that this airgap process can be integrated into its standard CMOS chip manufacturing processes, and that it has already been integrated into its fab in East Fishkill, New York. IBM expects to incorporate the airgap process into chips beginning in 2009, appearing first in its own Power chips for servers (that means Power6+) and then in chips it makes for others (like the Cell chips for Sony and Toshiba and the Xenon chips for Microsoft).

RELATED STORIES

IBM Goes Vertical with Chip Designs

Will 45 Nanometer Chips Make Two Warring Camps?

IBM to Ditch SRAM for Embedded DRAM on Power CPUs

IBM, AMD Expect 45-Nanometer Chips in Mid-2008

                     Post this story to del.icio.us
               Post this story to Digg
    Post this story to Slashdot