With No Power6 QCMs, IBM Waits for Power7

Published: June 8, 2009

by Timothy Prickett Morgan

Prior to the launch--or rather, relaunch--of the Power6+ processors in selected entry and midrange Power Systems iron at the end of April, I was suggesting that given the competitive pressure that was being brought to bear by Intel and Advanced Micro Devices with their latest X64 chips, now might be a good time to take a play out of the summer 2006 System p playbook and create quad-core modules (QCMs) for using the Power6+ chips and thereby take the fight to Intel and AMD.

The QCMs, you will remember, were based on IBM's dual-core Power5+ processors, and they put two whole dual-core chips into a single processor package, thereby doubling up the core and thread count for any given Power5+ machine. Because the heat of a processor rises on a log scale with clock speed, you can't run these two chips (four cores in total) at the same clock speeds as you would for a dual-chip module (DCM), what I would call a dual-core processor, in a single socket. If you did, the chips would burn up. But because there is a log scale relationship between clock speed and the energy a chip consumes and the heat it has to get rid of, you can dial back the clock speed a little and it can cool way down, thereby enabling two chips to fit in the same thermal envelope of one faster chip. Now here's the upshot: two chips running at a lower clock speed can do 50 percent to 60 percent more work than one chip running full-out. Moreover, the yields tend to be better at lower clock speeds and the chips cheaper, too.

It is a win-win scenario. Which is why I have been advocating for QCM variants of the Power6 and now the Power6+ processors. In fact, as I said just before the new Power6+ servers were launched (and when no one knew that some Power6+ machines had already been announced last October), IBM's own roadmaps suggested that Power6+ chips would have twice the oomph of Power6 chips, and that hasn't happened. Power6+ chips have a little more oomph, but we are talking 15 to 20 percent.

With Intel launching the quad-core "Nehalem EP" Xeon 5500s at the end of March and AMD launching its six-core "Istanbul" Opterons last week, an entry two-socket X64 box can bring a lot of oomph to bear on transaction processing workloads. And these two vendors are going to slash at each other in a bloody price war in the volume X64 server market, but it is the entry Power Systems lineup that may get hurt the most if IBM isn't careful. I already showed you two months ago how a Power 520 stacks up against a Nehalem EP box, and while on entry configurations the difference wasn't so bad, on multicore setups the X64 box has a three-to-one price/performance advantage. And that gap is going to open up and stay open, and perhaps even when eight-core Power7 chips arrive next year.

Because of this, I have been hoping that in a skunkworks somewhere in Rochester, Minnesota, IBM had come up with a QCM for Power6+ chips and was going to launch it right at the Nehalem and Istanbul X64 chips. But even though he didn't want to, Jim Herring, the director of high-end Power Systems at IBM's Systems and Technology Group, burst my hopeful bubble when I talked to him recently. "We have no plans for Power6+ quad-core modules," Herring said.

Well, that ends that, I guess. Unless IBM can cook it up fast over the summer and use it as a stopgap to fend off the assaults by Intel and AMD on the midrange database and application server market. When AMD was getting dual-core Opterons in the field, IBM got freaked out and quickly put out QCMs. Maybe as IBM sees the Nehalem and Istanbul chips stealing Power Systems business away, it might get freaked out again and do something about it. We have a long way to go before Power7 gets here. And by the way, by then AMD will have 12-core "Magny-Cours" Opterons that pack two six-core processors into a single package and it will not be surprising to see Intel do the same thing with its four-core Nehalems, either. If IBM thinks this is over when it gets to Power7 next year, it just isn't.

All IBM needs to do is get Power6+ QCMs into the field and price the software for each core in the QCM at half price and require that customers activate them in twosies to make the numbers all work out. If you think this is a reasonable plan of defense and offense, tell your business partner and tell your IBM rep. Lean on them a little. Maybe we can compel a little more intense competition here.

RELATED STORIES

IBM Launches Power6+ Servers--Again

Come On Out, Power6+, You Win

Power vs. Nehalem: Time to Double Up and Double Down

Power vs. Nehalem: Scalability Is So 1995, Cash is So 2009

IBM and Resellers Do the iLoyalty Blitz

i Roadmaps: Here Be Dragons

IBM Doubles the Cores on Midrange Power Systems

Intel Keeps Both Arms Swinging with Xeons, Jabs with Itanium

More Power7 Details Emerge, Thanks to Blue Waters Super

Intel's Nehalems to Star at IDF, AMD Pitches Shanghai

Intel Talks Up X64, Itanium Roadmaps Ahead of IDF

Intel Announces First "Penryn" Xeon Processors

Bang for the Buck: Raising the System iQ

IBM Finishes Up Power5+ Rollout on System p5 Servers

                     Post this story to del.icio.us
               Post this story to Digg
    Post this story to Slashdot