p5 Power5+ Machines Preview Possible Future i5s

by Timothy Prickett Morgan

It's the first week in October, and that is one of the traditional times for IBM to inject its latest Power processor technology into its Unix-based server lines and chase a little competitive money in the final quarter of the year. Customers using i5 machines have been told that they were not going to get the Power5+ processors in their machines this year, but the advent of the Power5+ presents some interesting possibilities for the i5 line in 2006.

The iSeries server line, as you all well know, runs IBM's proprietary i5/OS (formerly OS/400) operating system as well as IBM's AIX and Linuxes from Red Hat and Novell in logical partitions. There is no technical reason why IBM didn't deliver Power5+ machines in 2005 for the iSeries, but rather more a mixture of technological and economic forces. IBM is just ramping up the Power5+ chips and it needs every one of these chips to compete against 64-bit Xeon, Itanium, and Sparc processors in the Unix and Linux markets. With yields low, demand for performance high among Unix and Linux customers, all but the largest iSeries shops having plenty of horsepower with the current Power5-based i5 line, and iSeries business partners not wanting to cope with more server announcements, it is not really a surprise why IBM decided that the machines it rollout out in mid- to late-2004 will tide it over until 2006. Exactly when--and where--the i5 will get the Power5+ chip is unclear, and IBM likes it that way. March is a wonderful time to do server announcements, particularly for the i5 with the COMMON user group at the end of March; May is a good time, too, particularly if Intel plans to get its dual-core "Montecito" Itanium chips out the door in the spring. We'll have to see. In the meantime, we can look at the p5 servers to see what might be in store for the i5 line.

System p5: The new Power5+ Chip

With the Power5+ processor announcements this week, IBM is following on its tradition of beefing up its iron, to be sure. But like other server makers these days, IBM's approach to rolling out new processors is just as focused on keeping the electricity usage and heat dissipation to a minimum while driving up the performance it can deliver in a particular machine's form factor. Way back in 2002 and 2003, when Big Blue was talking up the roadmap for the 64-bit Power processors and was gloating quite a bit that it had dual-core chips in the market for years and no one else was even there yet, the company said it expected to have the Power5+ processors out the door in late 2005 or early 2006 using a 90-nanometer chip-making process and that clock speeds would be in the 2 GHz to 3 GHz range. These are the same roadmaps that showed IBM hitting as high as 6 GHz with the Power6 family of chips, which will come after the Power5+ chips that were announced this week have been sold for a little more than a year. Then, as the years went by, IBM took the clock speeds off the roadmaps. And with good reason. Because the need for clock speed is being replaced by the need to keep servers within very precise thermal envelopes. Customers indeed want more processing power, but they just can't take another couple hundred watts to get it.

And to that end, IBM has decided to make use of the 37 percent shrink in die size with the Power5+ chips to do clever things with packaging that will allow customers pack a lot more oomph in their pSeries Unix and OpenPower Linux servers. IBM's approach is, in one case, very similar to that which rival Hewlett-Packard took to make the dual-core PA-8700+ and Itanium mx2 dual-core modules, as well as the techniques that Intel hurried to market to turn its smaller single-core chips into quick-and-dirty, dual-core, single-socket processors.

Specifically, IBM has a new Power5+ dual-core module (DCM) that runs at 1.9 GHz, which is up from the 1.5 GHz and 1.65 GHz clock speeds delivered in the Power5 generation last year. This DCM has, as the name suggests, two processor cores and the L2 caches as well as L3 cache (where it is available) all put inside a single piece of ceramic that plugs into a single socket on a motherboard. This version of the Power5+ chip is smaller and cooler, which means IBM can crank the clock speed up a little bit; the exact wattages and relative performance figures for the 1.9 GHz Power5+ compared to the 1.65 GHz Power5 chip were not available at press time. This Power5+ DCM almost certainly has the same or lower electricity needs and heat dissipation than the Power5 chips it replaces in the entry and midrange of the pSeries line.

The new--and somewhat unexpected--addition to the Power chip family with the Power5+ launch is a new Quad Core Module (QCM), which puts four Power5+ cores running at a slower 1.5 GHz on a single piece of ceramic and plugging into a single "Squadron" server socket on the motherboards where IBM is initially supporting it. This QCM is akin to what HP and Intel did to bootstrap dual-core, single-socket chips, but IBM--being something of a showoff these days when it comes to processor performance, chip-making processes, and chip packaging--has gone one step further and pulled the same trick with dual-core Power5+ chips.

The new Power5+ processors are being rolled out in IBM's entry, single-socket p5 520+ and midrange, two-socket p5 550+ and p5 550Q servers. According to Jeff Howard, program director at IBM's Systems and Technology Group with responsibility for the pSeries line, the bigger midrange p5 570 Squadron boxes (which scale from 2 to 16 cores) and the p5 590 and 595 (which scale up to 32 and 64 cores) will not get the Power5+ processors until some time in 2006.

The first machine to get the new 1.9 GHz Power5+ DCM chip is the p5 520+, a single-socket machine. This box comes in tower and 4U rack configurations, and the DCM has 36 GB of L3 cache in the module (but not on the Power5+ core itself). Because IBM is switching to DDR2 main memory, the p5 520+ can have twice the main memory as the Power5 version, which in this case means 32 GB. The server has eight drive bays that can accommodate up to 2.4 TB of disk capacity, and comes with a single GX I/O bus. Customers who want to support more disk drawers can add a second GX I/O bus to support a Remote I/O (RIO) drawer or a 4X InfiniBand fabric interface for clustered database or high-performance computing environments. With a maximum of four RIO drawers, the p5 520+ can hold 16.8 TB of disk capacity, which is a lot of storage for a two-core server. The p5 520+ has three media bays, one 266 MHz PCI-X slot, four slower PCI-X slots, and two Gigabit Ethernet ports. Customers can buy a version of the machine with either one or both of the Power5+ cores activated. A preconfigured p5 520+ Express version of the server has two cores activated, 2 GB of main memory, two 73.4 GB, 10K RPM disks, and a no-charge activation of the second processor for $16,103.

The p5 550+ has been more heavily re-engineered for this announcement than the p5 520+. The motherboard used in the p5 550+, which uses the DCMs, and the p5 550Q, which uses the QCMs, has a new I/O planar board that has half the latency in I/O performance as the board used in the original p5 550 announced last summer. The motherboard also supports DDR2 main memory, which doubles the maximum capacity of this two-socket server to 64 GB. Like the p5 520+, the p5 550+ and p5 550Q have eight hot-swap drive slots, three media bays, one 266 MHz PCI-X slot, four slower PCI-X slots, and two Gigabit Ethernet ports. It comes with two GX I/O buses by default, and it crams this all into a 4U, rack-mounted form factor. The p5 550+ machine comes with either two or four Power5+ cores activated at 1.9 GHz (and uses the Power5+ DCM), plus 2 GB of main memory per core, two 73.4 GB disks, and a spare processor activation (aimed mostly at running Linux). There is 36 MB of L3 cache on the DCM. With four 1.9 GHz cores activated, 8 GB of main memory, and the two disks, the p5 550+ costs $22,966.

Customers who need a little extra oomph can go for the p5 550Q model with the QCMs and pack as many as eight 1.5 GHz cores (and 16 threads thanks to the Power5 chip and Power5+ chip supporting simultaneous multithreading) into a 4U form factor. (Just how much extra computing this results in remains unclear, but my first-pass guess is that the p5 550Q delivers about 30 percent more performance than the p5 550+ with all four cores activated.) With four cores activated, 8 GB of main memory, two 73.4 GB disks, and two no-charge processor activations, the p5 550Q costs $21,713; with eight cores and 16 GB of memory, the machine costs $37,428.

The p5 520+, p5 550+, and p5 550Q machines all support AIX 5L 5.2 and 5.3 (but you will want the latter if you want SMT and dynamic logical partitioning). IBM also supports Linuxes from Red Hat and Novell on the machines--specifically, Red Hat Enterprise Linux AS 4 for Power and SUSE Linux Enterprise Server 9 for Power. These machines will also be sold in so-called OpenPower editions, where IBM only allows Linux to be installed on the machines and cuts the prices. They will be available on October 14.

In addition to the new Power5+ machines, IBM is also delivering its first 1U Power5 machine, the p5 505. Last year, IBM delivered a skinny Power5-based p5 510 server in a 2U form factor, but has squeezed the machine down by half to create the p5 505 rack-mounted server. (You are probably thinking: Why not deliver the Power5+ chip running at 1.9 GHz in this machine, too? Why isn't it a p5 505+, right? That's a good question, and eventually, when Power5+ yields are up, I expect the answer will be, "Now, it is.") The p5 505 uses the 1.5 GHz and 1.65 GHz Power5 DCMs, which have 36 MB of L3 cache shared between the cores. The main memory in the server expands up to 32 GB, and it comes with two hot-swap disk bays, two PCI-X slots, a media bay for a DVD ROM or RAM drive. With a single 1.65 GHz Power5 core, 1 GB of main memory, one 73.4 GB disk drive, and a freebie processor activation, the p5 505 costs $3,750; with two 1.5 GHz cores and 2 GB of main memory, the machine costs $4,920; and jacking the two cores up to 1.65 GHz pumps the price up to $5,750.

IBM is also announcing this week that on October 14 it will begin shipping the eight-socket, 16-core version of the p5 575, which uses 1.5 GHz Power5 processors, as it promised it would earlier this year. You might be thinking, if there is a p5 550Q, why would anyone want this machine? Main memory and I/O bandwidth. The p5 570 in the 16-core configuration has main memory that is four times larger--up to 256 GB--and nearly 100 Gbit/sec of I/O bandwidth. IBM reckons it can sustain 87.3 gigaflops of peak number-crunching performance on the Linpack HPC benchmark. IBM can lash up to 128 of these machines together to create a 2,048 processor complex which would deliver over 11 teraflops of computing power.

System i5: The Possibilities

I think IBM will almost certainly put the Power5+ processor into i5 520 Express configurations, as IBM has just done with the p5 520 and OpenPower machines. But IBM doesn't have to do this. IBM just opened up the governors a little to create a 2,400 CPW i5 520 Express machine with 60 CPWs of green-screen power using the 1.5 GHz Power5 chip. This is a lot of computing based on the AS/400 and iSeries scale; IBM could just use the existing 1.65 GHz Power5 chip in the i5 520 Express configurations, much as it does with a few models of the regular i5 520 machines in the current i5 line. Doing so, it could get a single-core machine with about 3,300 CPWs out the door in quick fashion, and might deliver it with 120 CPWs of green-screen performance. Moving to the new 1.9 GHz Power5+ DCM makes no sense in a single-core machine, since heat is not much of an issue and the Power5+ needs to be conserved for machines with at least two cores activated. That means the i5 520 regular machines could get these processors, which would deliver about 6,900 CPWs of performance for a two-core configuration, which is about a 15 percent performance boost.

I think that boosting the performance of the entry i5 boxes while keeping the price low (at least compared to the i5 550 and i5 570) is a strategy that IBM will probably undertake with the Power5+ chips in the spring of 2006. IBM could even use the Power5+ rollout as a way to completely revamp its entry i5 machines, completely taking off the governors and pricing the boxes very aggressively for green-screen and non-5250 workloads alike. I think this is unlikely, but desirable nonetheless. (If you want to see just one example of the kind of strategy IBM should do to pump up the iSeries business, see "The Lean, Mean RPG-5250-DB2/400 Machine" from the September 12 issue.) I would wager that IBM is going to be conservative with the i5 line in 2006, just as it has always been, but I would also point out that the p5 505--including its aggressive pricing--would look mighty fine running i5/OS.

With the i5 570s selling well and using slower Power5 processors than the p5 line gets, it might make sense for IBM to jump up to 1.9 GHz Power5+ chips in the i5 570. But it is hard to say for sure. It would be interesting to see if the i5 550 gets the Power5+ QCM chips, with four cores per socket and eight cores per machine running at 1.5 GHz. This machine packs a lot of wallop for a 4U rack-mounted box. The current i5 550 has from one to four of the Power5 processor cores running at 1.65 GHz, delivering between 3,300 CPWs and 12,000 CPWs. By moving to the 1.9 GHz Power5+ DCMs, the performance of this box could be improved around 15 percent (the p5s are showing a 13 percent increase), hitting maybe 3,800 to 13,800 CPWs. By moving to the 1.5 GHz Power5+ QCM, the performance increase is a lot more interesting: an eight core i5 550+ would deliver about 75 percent more performance, or about 21,000 CPWs.

With the i5 570s selling well and using slower Power5 processors than the p5 line gets, it might make sense for IBM to jump up to 1.9 GHz Power5+ chips in the i5 570. But it is hard to say for sure. It would be interesting to see if the i5 550 gets the Power5+ QCM chips, with four cores per socket and eight cores per machine running at 1.5 GHz. This machine packs a lot of wallop for a 4U rack-mounted box. The current i5 550 has from one to four of the Power5 processor cores running at 1.65 GHz, delivering between 3,300 CPWs and 12,000 CPWs. By moving to the 1.9 GHz Power5+ DCMs, the performance of this box could be improved around 15 percent (the p5s are showing a 13 percent increase), hitting maybe 3,800 to 13,800 CPWs. By moving to the 1.5 GHz Power5+ QCM, the performance increase is a lot more interesting: an eight core i5 550+ would deliver about 75 percent more performance, or about 21,000 CPWs. As far as larger machines go, the i5 570s might get 1.9 GHz Power5 or Power5+ chips; the p5 570 already has 1.9 GHz Power5s. And the larger i5 595 and p5 590 and 595 boxes top out at 1.9 GHz with the current Power5 multichip modules (MCMs). IBM is probably able to get the Power5+ chips to a couple of hundred megahertz above the performance set in the 1.9 GHz Power5+ DCMs, and 2.2 GHz or about another 15 percent boost seems likely. That will put the i5 595 at around 190,000 CPWs or so. If IBM can somehow double up the cores in the MCMs, as it did to create the QCMs, then high-end i5 and p5 customers could be looking at a 75 percent or so boost in performance even if IBM reduced the clock speed to 1.7 GHz or so in the Power5+ cores. It will be interesting to see what IBM does.