Volume 3, Number 22 -- June 13, 2006

Woodcrest Xeons Due on June 26, Tulsa Pulled into Q3

Published: June 13, 2006

by Timothy Prickett Morgan

Chip maker Intel said late last week that it would launch the much-awaited "Woodcrest" Xeon processors for two-socket servers on June 26, marking the first time in years that the company could claim that it offers better performance, power efficiency, and value than Opteron processors from rival Advanced Micro Devices.

The Woodcrest Xeons are true dual-core processors that are based on the new Core microarchitecture. The Core microarchicture was formally announced this spring, and is a distinct break from the NetBurst architecture embodied in prior generations of Xeon server and workstation chips. The Core chips are derived from Intel's energy-efficient Pentium M laptop processors, rather than using the beefier Pentium 4 cores that are at the heart of the NetBurst-style chips. With the Core architecture, Intel is reducing the size and complexity of each processor core and also cutting back on processor cycle times, which means chips run a lot cooler. This lower temperature means multiple processor cores can be added to a given chip area, and new 65 nanometer chip making processes means Intel can actually deliver on the theoretical compactness that the Core design embodies.

Intel and AMD are in a contest to see who can deliver more computing power and the most power-efficient designs, and depending on the benchmarks you talk about, it looks like the Woodcrest Xeons and Opteron 200s are, core for core, about dead even. Intel had originally slated the Woodcrest chips for delivery later this year, but their "Dempsey" Xeon DP predecessors were late to market and, more importantly, were based on the NetBurst architecture and therefore did not offer compelling performance per watt. Dempsey has turned out to be little more than a way to certify a "Bensley" platform, which supports the current dual-core Dempsey chips as well as the impending dual-core Woodcrest and future four-core "Cloverton" Xeon DP variants.

Intel also said last week that is was able to bring its dual-core "Tulsa" Xeon MP processor, which was expected to come to market in the fourth quarter, ahead to the third quarter. If Intel is concerned about Opteron in the two-socket server space, it is getting whipped badly by Opteron in the four-socket server space. This is why Dell said a few weeks ago that it would deliver PowerEdge servers using Opteron 800 series processors. The Tulsa chips might have 16 MB of shared L3 cache memory (a first for Intel) as well as 1 MB or 2 MB of L2 cache per core, and they might offer twice the performance of the single-core "Potomac" Xeon MP processors that are now two years old and, presumably, considerably more oomph than the current dual-core "Paxville" Xeon MPs, which are sold as the Xeon 7000 series. (You will remember that Intel pulled the Paxville chips, which were due in early 2006, into the final months of 2005 last year.)

But the Tulsa Xeon MPs are still NetBurst architecture, which means they burn a lot of juice to do their work. And a 667 MHz or 800 MHz front side bus is not a lot to brag about, either. Tulsa chips are expected to have clock speeds in the range of 2.5 GHz to 3.4 GHz. Unless that L3 cache does a lot to improve performance, the Tulsa chips will only offer about 15 percent more performance, and you have to assume that, given the desire to not add electronics and therefore heat to a server, Intel has done the math and figured out that the extra juice burned by the L3 cache is worth it when it comes to performance per watt.

AMD is expected to launch its "RevF" next-generation Opteron processors in July, which will support DDR2 main memory and incorporate a new socket technology called Socket F. These new sockets are denser and do away with the familiar pins and use a land grid array to link the CPU cores to the motherboard; the grid looks like gold bearings, and they are a lot easier to manufacture and manipulate than the hairy pin architectures of the past. The Rev F Opterons also have "Pacifica" AVT features for hardware-assisted virtualization, which will make virtual machine partitioning more efficient. But what the Rev F Opterons will not have, unless AMD changes its mind, is a faster HypterTransport interconnect and they will not be made in a 65 nanometer process, but rather the current 90 nanometer process. AMD is banking that Intel cannot pull that far ahead as it moves to 65 nanometers, giving AMD time to squeeze more production out of its current 90 nanometer fabs. Time will tell if this was a good bet or not.


Dell Pre-Announces Generation 9 of PowerEdge Servers

Server Makers Dabble in Dempsey Xeons, Wait on Woodcrest

AMD Says It Can Still Beat Intel Cores with Opterons

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Editor: Timothy Prickett Morgan
Contributing Editors: Dan Burger, Joe Hertvik, Kevin Vandever,
Shannon O'Donnell, Victor Rozek, Hesh Wiener, Alex Woodie
Publisher and Advertising Director: Jenny Thomas
Advertising Sales Representative: Kim Reed
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