Intel Names Server Platforms, Adds Chips to Roadmap
by Timothy Prickett Morgan
Intel has been saying since the spring that, in the wake of its shift from increasing gigahertz and cache to add value to chips to the use of multiple cores and cooking other features such as virtualization into the chips, it would be focusing more on creating and selling the components behind workstation and server collectively as platforms and less on the feeds and speeds of the components that go into these platforms. Last Thursday, Intel rolled out the naming conventions for its workstation and server platforms, and it also added two more dual-core chips to its roadmap.
According to Phil Brace, general manager of Intel's Server Platforms Group marketing, the naming convention changes are being pegged to the roll-out of dual-core Pentiums, Xeons, and Itaniums, which is easier than trying to backcast the naming conventions to existing products. By talking about platforms instead of components, Intel is looking to get something that encapsulates the basic characteristics of a platform and yet is more broad than just rattling off the name of the processor; its clock speed, cache size, and frontside bus speed; and the chipset it uses to make the workstation or server.
But Intel is looking for more than better shorthand to talk about its platforms. Because processors and chipsets are commodities and Intel wants to sell platforms--which have many chips and many different standards, all of which are steered by Intel or with Intel's strong input--Intel has to think platforms and talk platforms if it wants its customers, the OEMs of the world, to buy platforms. Intel is doing at the electronics level what server makers used to do at the system level when they controlled their own processors, memory technology, operating system, and development tools. When you buy into an Itanium or Xeon platform, you are buying into more than just a chip, but an Intel way of building the basic guts of a system--processor, chipset, communications chips, virtualization hardware, drivers, power management, and a set of interfaces that link an operating system to these features.
Brace says Intel has not completed the exact naming schemes of the different server platforms as yet, but has laid out a framework of naming conventions that it believes can describe Intel's product line for the next decade, and do so a lot more simply than rattling off a lot of code names and feeds and speeds. So, the 3000 Series will be the entry point in the server line, with Pentium D processors and the E7221 chipset. The 5000 Series platforms will be comprised of the future "Dempsey" dual-core Xeon DPs and their "Blackford" chipset; this platform was formerly known as "Bensley," and 5000 Series will probably stick a little better to IT employees and IT vendors who are used to numerical naming schemes. The 7000 Series platform will be comprised of the "Paxville" and "Tulsa" dual-core Xeon MPs and the E8501 chipset; this platform was formerly known by the code-name of "Truland." And, at the top of the platform heap is the 9000 Series, which is comprised of the dual-core "Montecito" and "Montvale" Itanium processors and Intel's E8870 chipset. Presumably, Intel will iterate the first, second, and third digit from the right as the years go by to designate changing platforms; Brace said that the final names even for the dual-core platforms that will possibly begin shipping this year have not been finalized. There are obviously enough digits in the platform naming scheme to differentiate within a given year's products as well as across the years.
Complaints from customers and server makers about the amount of heat that processors are generating are what forced all chip makers to move to multiple cores rather than cranking clocks, but in addition to increased performance, Brace says that Intel's ultimate customers--the end users who buy workstations and servers--want an absolute reduction in the amount of juice their machines burn and the heat they generate. Intel has been shipping low voltage (LV) variants of some of its Pentium, Xeon, and Itanium chips for years, which have reduced clock speeds and voltages and substantially reduced electricity usage and heat dissipation. But apparently two power levels on chips--regular and low voltage--are not enough, and that is why Brace says Intel, at the request of customers, will be adding what it calls a mid-voltage (MV). In the second half of this year, the "Irwindale" Xeon DP, which is a 64-bit Xeon that has 2 MB of cache and an 800 MHz front side bus, will be the first MV variant Intel ships for its "Lindenhurst" platforms. Specifically, there will be a performance-optimized Irwindale that runs at 110 watts and that offers the best performance for 2U rack servers and pedestal servers where heat is not an issue. Then there will be an Irwindale MV that operates at 90 watts or less that is aimed at rack servers where vendors are trying to balance the desire for density against the need for speed. Rounding out the Irwindales, there will be an Irwindale LV chip, which operates at 55 watts. This chip is aimed at embedded devices and other platforms where power usage and heat dissipation are the main concern.
At the spring Intel Developer Forum, the company said that it had 15 dual-core projects underway, and last week, it announced it has added two more to the mix. First up is a new chip code-named "Sossaman," which is a low-voltage Xeon chip that will operate at 31 watts. Sossaman LV is a dual-core chip, just like the Dempsey Xeon DP, and it will apparently use the Lindenhurst chipset. Intel is also announcing a Dempsey MV chip for rack servers, which will shed less heat than a regular Dempsey (presumably in the same 90 watt range as the Irwindale MV, but Intel is not saying.) The Dempsey, Dempsey MV, and Sossaman LV chips are all slated for the first half of 2006. Kickers to the Dempsey chips, known as "Woodcrest," will follow in the second half of 2006, as will a kicker to the Sossaman, also pegged at 31 watts. Exactly what makes Sossaman different from a Dempsey, Intel is not saying, but the scuttlebutt is that Sossaman is a variant of the dual-core "Yonah" Pentium M processor for laptops that has 2 MB of cache and a 667 MHz front side bus. The important thing is that Intel is getting it that heat is a problem and that Advanced Micro Devices has been helped by its better performance per watt with the Opterons and Athlon 64s.
While Brace could not talk about specific clock speeds and performance on these chips, he was happy to offer some relative performance figures for both performance-optimized and ultra-dense scenarios. For performance optimized setups (meaning heat is not an issue), Brace said that a dual-core Dempsey chip in the Bensley platform (or should we say a 5000 Series platform) would offer just under twice the performance of the current Irwindale chip and Lindenhurst chipset, and that the future Woodcrest/Bensley combo due in the second half of 2006 would offer nearly three times the performance. (Those performance figures are based on the SPECintRate benchmark.) Woodcrest is apparently a different core from the Pentium 4 and Pentium M cores that are at the heart of Intel chips today (excepting Itanium, of course), and will have a lower power profile than the Pentium 4 cores at the heart of the Xeons.
For the ultra-dense scenario, Brace compared a future Irwindale LV/Lindenhurst platform to the Sossaman/Lindenhurst platform due in the first half of 2006 and to a future, unnamed chip in the Bensley platform due in the first half of 2007. In terms of SPECintRate per server racks, a rack of servers using the Sossaman chips offered a little more than twice the performance per rack, while the future Bensley platform would offer almost 3.5 times the performance per rack. You can pack more chips in a rack when the run cool, which was the lesson of early blade servers. But server makers focused on raw performance because that is how server buyers were used to thinking about it.
As for the 64-bit question, it is no longer a question. According to Brace, Intel has shipped more than 5 million 64-bit Xeon chips in the past twelve months, and that exiting the first quarter of this year, 90 percent of the Xeon chips that went out the door were 64-bit. Having relented to the market and delivered 64-bit Xeons, Intel has to tackle the dual-core deficit it still has compared to AMD's Opterons. Brace said that the ramp on the dual-core front was going well, and reiterated Intel's prior comments that as the company exits 2006, it expects that 85 percent of server chip shipments will be dual-core chips, with desktop and mobile chips coming in at about 70 percent. The dual-core Xeons are expected at the end of this year, as are the dual-core Itaniums. On the Xeon front, Intel is trying to pick up the pace. "The health of the silicon is looking very good right now, and we are looking at ways to accelerate the rollout," said Brace. Whether or not Intel can ramp up Montecito, too, remains to be seen.
Launching new server platforms in the first quarter of any year is tough, and if Intel slips solidly into the first quarter, it could be a rough fourth quarter for server makers. No one is going to shell out big bucks on single-core servers when dual-core boxes are right around the corner.