Fujitsu-Siemens Has Big Sparc Plans, Too

by Timothy Prickett Morgan

Sun Microsystems might be the creator of the Sparc platform and its Solaris environment, but the company does not necessarily always set the pace on that platform. Fujitsu-Siemens has a big Unix server business in Europe and Japan and has made headway pushing into Sun's indigenous American market with its PrimePower machines. Fujitsu-Siemens has taken a big iron approach to designing its Sparc64 processors and the servers that use them, which is a good fit for a lot of Solaris customers.

At the moment, Fujitsu, which does the chip designs for the PrimePower machines as its part of the Fujitsu-Siemens partnership, does not sell a dual-core Sparc64 processor. But its current crop of Sparc64 V processors are arguably as powerful doing real work as Sun's new dual-core "Jaguar" UltraSparc IV processors, which were announced last week. But Fujitsu knows it needs to keep pace with Sun, Hewlett-Packard, and IBM in the RISC processor market, so the company is readying a dual-core Sparc64 VI processor. This chip is expected to come to market sometime in the second half of 2004 according to the Fujitsu roadmap.

This Sparc64 VI chip will be Fujitsu's first dual-core processor. It will be implemented in a 90 nanometer copper/SOI process and made in Fujitsu's fabs in Japan. The chip will have 128 KB of on-chip L1 data/instruction cache per core, 6 MB of on-chip L2 cache memory shared by both cores, and an initial target speed of 2.4 GHz, according to Tom Donnelly, product manager of the PrimePower RISC/Unix server line at Fujitsu-Siemens.

Eventually, the Sparc64 VI chip will span a range between 2.1 GHz and 2.6 GHz, depending on the yields of the 90 nanometer process. The PrimePower server design does not include L3 cache, and Donnelly says the engineers at Fujitsu-Siemens do not believe that an L3 cache is necessary. IBM has used L3 cache in its Power4 and Xeon servers, and Sun is going to add L3 cache to the upcoming "Panther" UltraSparc-IV+ processors. Donnelly says that at the 2.4 GHz targeted clock speed, the Sparc64 VI processors will offer about three times the performance as the current PrimePower servers, which use 1.3 GHz and 1.35 GHz Sparc64 V processors made using a 130 nanometer copper process in Fujitsu's fabs in Japan.

The Sparc64 VI processors will not plug into the current PrimePower machines. As is the case with the dual-core Sun UltraSparc-IVs compared to the single-core UltraSparc-IIIs, the Sparc64 VI chips have a different pin out and therefore require new systems boards.

The next generation of PrimePower servers will also have main memory and system buses with twice the bandwidth as the current PrimePower XA designs. Fujitsu-Siemens does not, says Donnelly, have any plans to expand beyond the current 128-way SMP scalability it has with the PrimePowers with these future machines.

PrimePower customers who have the current Sparc64 V generation of machines will not be forced to upgrade to the new boxes just to get more oomph for their workloads, according to Donnelly. Fujitsu is going to crank up the clock on the Sparc64 V chips, too, so customers can protect their investments and jump to the new PrimePower platform when they need to. At the end of this year, the speed of the Sparc64 V chip will be boosted to 1.62 GHz using the current 130 nanometer copper process. In mid-to-late 2004, the speed of the Sparc64 V will be boosted to 1.8 GHz to 1.9 GHz and the on-chip L2 cache will increase from 2 MB to 4 MB using a 90 nanometer process. In mid-2005, Fujitsu will crank up the clock to 2.16 GHz and can in 2006 increase the on-chip L2 cache to 6 MB and boost the clock speed of the Sparc64 V to 2.4 GHz if customers need it to.

In early 2006, Fujitsu will crank up the clock on the Sparc64 VI to more than 3 GHz using a process that is smaller than 90 nanometers (65 nanometers seems likely). About the same time, Fujitsu will debut the Sparc64 V7 chip, which will have four cores on a single chip and a clock speed that ranges from 5 GHz in 2006 to 6 GHz by 2007, according to the current roadmap.