AMD Says It Can Still Beat Intel Cores with Opterons
Published: March 16, 2006
by Timothy Prickett Morgan
While Intel was hosting its semi-annual Developer Forum in San Francisco last week, Advanced Micro Devices was also a few blocks away in an undisclosed location, giving briefings to journalists, analysts, and PC and server makers who wanted to hear how AMD was going to counter Intel's low-powered Core processors for PCs and servers. AMD is pretty confident that it can continue to beat Intel and gain market share.
Brent Kirby, product manager for AMD's server and workstations group, took out a handful of AMD processors, a little bit of history, showing the evolution of the K2 and Opteron processors. He showed me the current "Rev E" Opterons, the single-core and dual-core processors based on AMD's 90 nanometer silicon-on-insulator technology, which are sold as the Opteron 100, 200, and 800 series in servers with one, two, or four or more sockets. I also got to take a close look at the future Opterons, code-named "Santa Rosa" and also known by the internal name "Rev F," and as you might expect, these chips are smaller and will presumably be faster. And Kirby dispelled some of the speculation surrounding these Rev F chips, because, quite frankly, some of the things that people are talking about being possible with the Rev F Opterons are not going to happen.
First of all, these processors, which are due in the third quarter of this year, not the middle of the year, are based on the same 90 nanometer process that the current Opterons use. "We can get a lot more mileage out of this process, and we are going to do that," explained Kirby. The Rev F chips will also make use of the current HyperTransport 1 infrastructure, too, rather than utilize a goosed version of the technology. The Rev F chips will have the same integrated 1 MB L2 cache memory per core, and will come in 68-watt Opteron HE and 95-watt Opteron standard variants; while Kirby didn't say this, it seems likely that AMD will eventually--but certainly not initially--offer a version, dubbed the Opteron SE, which runs at slightly higher clock speeds and emits more heat as well as the Opteron EE, which runs at 55 watts. With the future "Woodcrest" dual-core Xeon DP processor expected around the same time coming in at an 80-watt thermal design power (TDP), not including a memory controller (which the Opteron has integrated into the processor) and using hotter fully buffered DIMMs instead of DDR2 main memory, Kirby says that AMD doesn't need to move to a 65 nanometer process.
Intel's Pat Gelsinger, the former chief technology officer who is now in charge of the company's Digital Enterprise Group, which makes the company's server and PC processors and platforms, said at IDF that the move from 90 nanometer processes to 65 nanometer processes allowed Intel to move from one to two cores for essentially the same money. This would seem to imply that Intel will try to leverage a production cost advantage--if it indeed has one. But, let's face it. In the chip business, volume matters at least as much as--if not more than--technology, particularly when a price war breaks out, as many of us in the industry expect will happen now that the chips are on the table and known by server and PC makers.
What the Rev F machines do have is a new socket, called the Socket F, and instead of those little gold pins that can be bent and therefore make chips hard to make and handle, the Socket F is what is called an organic land grid array, or LGA, and that means there are a bunch of rounded, rugged bumps where there used to be 939 or 940 pins (depending on the Opteron socket). You just drop the CPU into the socket and you are good to go. (IBM's future Power6 chips have similar technology, by the way, and that may or may not be a coincidence, since IBM sells chip technology to AMD.) The Socket F is designed to be used for the next generation of multi-core Opterons, which are due in 2007 and which will use a 65 nanometer process. While Socket F will support registered DDR2 main memory, the one thing it will not do is plug into an AMD chipset. The "Thor" 8000 series chipset from AMD will be the last one that AMD does, and it is relying on Broadcom and nVidia to make chipsets for the new parts.
The Rev F processors will also support the "Pacifica" X86/X64 instruction set virtualization electronics, now called AMD Virtualization Technology or AVT, which is functionally equivalent (but not exactly compatible with) Intel's own "Vanderpool" Virtualization Technology or VT, which is part of the new Core microarchitecture. These chips will also have unspecified improvements in AMD's PowerNow! thermal management features, which are roughly equivalent to Intel's SpeedStep technology. These features deactivate parts of chips when they are not being used, which cuts down on electricity use and heat dissipation.
In the current crop of 90 nanometer Opteron processors from AMD, which were announced last April, AMD added support in the architecture for PCI Express peripherals, Gigabit Ethernet, Serial ATA-II disks, software RAID 5, and a hardware-based firewall. With the Rev F Opterons, the HyperTransport interconnect will stay the same, offering a front side bus frequency that will scale with the processors and deliver up to 22.4 GB/sec of bandwidth on a 2.8 GHz chip, 8 GB/sec of inter-processor bandwidth, and up to 12.8 GB/sec of memory bandwidth and up to 24 GB/sec of I/O bandwidth in a two-socket machine. With the Rev F machines, AMD and its chipset partners will add in TCP offload and Serial SCSI support, and the chipsets and the Rev F chips will have memory, reliability, and security enhancements that AMD is not prepared to detail as yet. (The security enhancements are code-named "Presidio.") The move to DDR2 main memory requires the Rev F chips to have a new memory controller, of course.
To get to quad-core processors, AMD will be moving to a 65 nanometer process in 2007, which will include a totally revamped Operton core, code-named "Deerhound" apparently and presumably also known as Rev G. These Rev G chips make jump from HyperTransport 1.0 to the HyperTransport 3.0 interconnect (hey, what happened to HyperTransport 2.0?), and a new architecture that incorporates L3 cache. (The rumor is that it will be a few megabytes of cache, and it will be on the die, not in the package alongside the die.) With the initial Opterons and the Thor chipset from AMD, the cache structure allowed server makers to gluelessly create servers with two, four, six, or eight sockets, and strangely enough, very few of them have. (The cache memory latencies apparently were very high, so the SMP scalability you got was not that great.) With the next generation of Opterons due in 2007, the L2/L3 cache architecture will also glueless connection of up to 32 cores--and maybe even more--without extra chipset work. This is a big deal for big iron, particularly if AMD can boost the HyperTransport bandwidth and lower that cache latency. These future Opterons will also have AMD's variant of I/O virtualization, which Intel launched at IDF as VT-d. The Rev G chips and related chipsets will incorporate PCI Express 2 peripherals and have unspecified fault tolerant I/O enhancements--almost certainly related to the I/O Virtualization technology that AMD is weaving into the chip.
Intel's initial quad-core Xeon chips will actually be two dual-core chips sharing the same package (as it did to make the dual-core "Paxville" Xeons from single core "Irwindale" Xeons to blunt, however ineffectively, AMD's actual dual-core Opterons), but AMD will be doing real quad-core chips, putting four cores, probably with a per-core L2 cache and a shared L3 cache, on a single die.
AMD has not said what the thermal design power of the Rev G chips will be, but it is certain that it will be the same or lower than the current TDPs for dual-core Opterons. Otherwise, server makers and customers will balk. It would be very interesting to see AMD make dual-core chips using the same 65 nanometer process, and get the power use way down below 50 watts. Some customers want the same performance and less heat, and still other customers will take even less performance for a lot less heat.