The 64-Core Power6-Based Power 595 Starts to Roll in May
Published: April 10, 2008
by Timothy Prickett Morgan
At a customer event that IBM hosted in San Francisco on Tuesday, the company finished fleshing out the big missing piece in its recently unified Power6-based server family: the Power 595. Like the Power5 and Power5+ System p 595 and System i 595 machines that precede it, the Power 595 server scales up to 64 processor cores and thanks to denser memory and a redesigned backplane and interconnect, can scale up to 4 TB of main memory in a single system image.
With the high-end of the Power6 line, IBM is taking a slightly different approach from the multichip modules (MCMs) that it has made in the past. In the past machines, four dual-core processors and external L3 cache memories were plunked onto a single piece of ceramic and interconnected and then plugged into a cell board. This time around, IBM is being smarter and making a much smaller and presumably a much less expensive packaging for the high-end of the Power6 chips in that it is putting a single dual-core Power6 chip running at 4.2 GHz or 5 GHz and an external 32 MB L3 cache that buffers those cores with main memory data on a single module. (Technically, this is also a multichip module, since the L3 cache is still distinct from the CPUs, but IBM is stretching the definition a bit). Four of these modules are placed on a Power 595 cell board (what IBM calls a book), for a total of eight cores and 128 MB of L3 cache, with 32 DDR2 DIMM memory slots. IBM supports a maximum of 1 TB of main memory using faster 667 MHz DDR2 memory; those wanting more capacity than that have to switch to slower 533 GHz DIMMs.
The machine, which goes by the product number 9119-FHA, can have from one to eight of these cell boards in a single system image, spanning up to 64 cores, 128 instruction threads, 1 GB of L3 cache, and 256 memory slots. Each processor book has redundant service processors and four GX-style I/O slots, which feed a maximum of 600 PCI-X slots using the 24-inch I/O drawers favored by high-end System machines and System z mainframes. (The System i machine used 19-inch I/O drawers, but from here on out, the Power 595 will use non-standard 24-inch racks except for customers who migrate from System i 595 machinery.)
The Power 595 machine comes in its own full-height chassis, and with its green stripe and baffled air scoops on the front, bears a strong resemblance to the System z10 mainframe that Big Blue launched at the end of March. Both machines are in a 24-inch, full height rack unit.
Most of the space in that chassis is used up with processor and I/O drawers, plus power supplies, cooling fans, the backplane, and other gadgetry. The Power 595 has 70.5 TB of internal SCSI storage capacity from 480 internal hot-swap drives. The server also supports various I/O drawers that in turn support SAS and SCSI disk drives with RAID data protection; specifically, the machine has enough I/O pipes to support 960 hot-swap SCSI disks (for a total of 288 TB of capacity) or 2,220 hot-swap SAS drives (for a total of 666 TB of capacity outside of the main frame--pun intended).
The key new feature of the Power 595 server is, of course, the dual-core Power6 processor, which appeared first in the System p line of AIX and Linux servers in May 2007 in the System p 570, which spans from two to 16 cores in a single system image. That System p 570 shipped in June and a System i variant was announced in July 2007 and began shipping in September. At the end of January this year, IBM added Power6 processors to an entry and a midrange machine, the Power 520 and 550, respectively, which had System p brands back then, and last week it launched variants of these two machines that are configured with the i 6.1 operating system (formerly known as i5/OS V6R1). The Power6 chip also appeared last fall in the four-core JS22 blade server and last week in the dual-core JS12 blade server, and those machines run AIX 5.3 or 6.1, i 6.1, or Linux 2.6.
The Power6 chip is the result of years of engineering by Big Blue, and is a complex collection of processing elements. The chip includes decimal math units and AltiVec VMX vector co-processors, as well as a two-core, four-thread instruction stream that runs at 3.5 GHz, 4 GHz, 4.2 GHz, 4.7 GHz, and now 5 GHz. Each chip has 4 MB of dedicated L2 cache per core and in most configurations the dual-core chip has access to an external 32 MB L3 cache. While the clock speeds on the Power6 chips are roughly twice as high as the predecessor Power5+ chips, customers can expect to see performance boosts in the range of 50 percent to 100 percent, depending on the workload. (The instruction streams in the Power5+ and Power6 chips are different, which means that goosing the clock speed did not necessarily deliver a linear improvement in performance; those applications that are sensitive to memory and I/O bandwidth will see the most improvement, presumably. For instance, IBM says that it has run an SAP Sales and Distribution (SD) benchmark test on the Power 595 and is getting twice as much work done on it as it could with the Power5+ based 595 with the same 64 cores. Contrary to its normal practices in launching a new machine, IBM has not delivered comparative performance benchmarks--rPerf for AIX and Linux and CPW for i5/OS and i--for the Power 595 machine. These are expected soon, say IBM sources.
The Power 595 machine will be available starting May 6, but not all operating systems are available for it on day one. AIX 5.3 at the 5300-08 technology level (that's IBM speak for an update) will be ready even before the machine is, on April 28. Customers who want to stick with AIX 5.3 at the 5300-06 technology level with Service Pack 7 or with AIX 5.3 at the 5300-07 technology level with Service Pack 4 have to wait until May 28. The new AIX 6.1 operating system, announced last fall, will be available at the 6100-01 technology level or higher starting on May 30, and starting July 2, IBM will support AIX 6.1 at the 6100-00 technology level with Service Pack 5 or higher on the new Power 595 box. IBM will support i5/OS V5R4 and the new i 6.1 releases on the Power 595 server starting on September 9, and Linux will not be supported on the machine until October 24. IBM is supporting Novell's SUSE Linux Enterprise Server with Service Pack 2 and Red Hat's Enterprise Linux 4.7 and 5.2 on the Power 595. It is unclear why operating system support is taking so long on the machine.
The base 9119-FHA frame costs $91,000. A book with eight 4.2 GHz cores costs $42,000 and a book with eight 5 GHz cores costs $60,500--and those prices do not include processor activations, which are $21,100 and $30,300, respectively, per 4.2 GHz or 5 GHz core. Going full-out to 64 cores for the 5 GHz version would therefore kick up the price on the base machine to $2.51 million. And that is without main memory, disk drives, I/O drawers, and such. A 32 GB DDR2 main memory card with no memory activated costs $82,592, and it costs $1,515 per GB to activate the memory on the board. So just to put 1 TB of main memory on the Power 595 would take 32 such boards at a cost of $2.64 million, and activating the memory on the boards would cost another $1.55 million. So a 64-core, 1 TB machine with no disk, no I/O, and no systems software would cost $6.7 million. That is a lot of cash, but then again, it is the most powerful general-purpose computer with a single system image in the world.
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