Sun Plans to Scale T2+ Servers to Four Sockets, Maybe More

Published: April 17, 2008

by Timothy Prickett Morgan

Last week, Sun Microsystems began shipments of its first two-socket variants of its "Niagara" family of servers, marking a new phase in scalability for its multicore Sparc server product line. While Sun still sells plenty of big iron, much of it is too big and too expensive for the huge installed base of customers using machinery based on UltraSparc-II and UltraSparc-III processors, which date from the late 1990s and the early 2000s, respectively. The answer, of course, is to make more scalable Niagara servers using the Sparc T family of chips.

Tongues have been wagging for years that this has, in fact, been Sun's plan all along: to take the T1 chip, goose it with more threads and floating point units, and then mesh multiple chips together into a family of symmetric multiprocessing (SMP) servers that could compete with various X64-based SMP boxes and do the one thing that X64 boxes--even those running the X64 variant of Solaris 10--cannot easily do: run application code that was designed specifically for the Sparc architecture.

Being a cut-down and threaded variant of the UltraSparc-II, the Niagara family of chips, which include the original "Niagara" Sparc T1, the "Niagara-2" Sparc T2, and now the "Victoria Falls" Sparc T2+, are perfectly suited to running applications that are currently on aging Sparc iron. And while the dual-core UltraSparc-IV+ machines made by Sun and the dual-core Sparc64-VI machines made by Fujitsu-Siemens and resold since last year by both companies as the Sparc Enterprise line have lots of bandwidth and oomph, they are not cheap, they are not cool (in terms of temperature), and they are not small. The Niagara family of machines offers better bang for the buck on many workloads and better performance per watt, particularly with the new T2+ machines (I am extrapolating on that one).

This explains why the Niagara class of servers have grown to a $1.3 billion annualized run rate after only a year and of half of sales, a figure that was provided to me by Mat Keep, product manager for Niagara Systems at Sun, during last week's Victoria Falls Sparc T2+ chip and its "Maramba" T5140 and T5240 servers.

The Maramba server put two T2-style processors in a single 1U or 2U server and they are hooked together through their memory buses to present a single system image to main memory and the operating systems that run on that image. Last week, Keep confirmed that Sun was indeed working on a four-socket box that would use another variant of the Victoria Falls chip, which we have heard is code-named "Botaka" from a number of sources and which, if history is any guide, will be a 4U chassis and will be called the T5440. The Maramba platforms got their name from one of the rivers that feeds Victoria Falls, which separates the African countries of Zambia and Zimbabwe, and Botaka is the name of one of the gorges off the falls. I joked back in March that if you wanted to make a big-dog server out of lots of T2-class chips, you would name it Zambezi, after the main river that feeds the falls in Africa. As it turns out, Zambezi is indeed a code-name at Sun, but it is the code-name for the crossbar switch electronics that will be used to glue four T2+ chips together into a single system image in the T5440 server, which Keep says Sun will deliver sometime in the second half of 2008.

Now, here's the interesting bit. The two T2+ sockets in a Maramba server link together gluelessly--meaning that they have the electronics right on the chip to link their memories together and you do not have to do any more. (This extra circuitry for SMP clustering is the main reason why Sun cut out the "Neptune" 10 Gigabit Ethernet ports that were part of the T2 chip when it moved to the T2+ design.) But once you move to a crossbar switch architecture, then there is no reason to stop at four sockets. If the crossbar is designed correctly, of course.

Sun is not saying that eight socket or larger Niagara machines are in the works. "There are more multi-socket versions coming," Keep said, but as for a machine ganging up lots of T2+ chips, "there is no plan to do that right now" is all he would say.

True and not true. The UltraSparc RK chip, according to the documents I saw years ago, are comprised of 16 Sparc cores, divided into groups of four that share L1 caches that are in turn linked to each other and to four banks of L2 cache by a crossbar switch embedded on the chip. Sun clearly has a very scalable crossbar inside the Rock chip, and it is also likely that this crossbar can be extended to support multiple Rock chips in a single system image, perhaps scaling from two, four, or eight sockets, each with 16 cores inside each socket. Whatever Sun can do for Rock, it can do for the T2 chip.

And I am beginning to think, once again, that the differences between Niagara and Rock chips are not as great as we have been led to believe. To be sure, Rock will implement transactional memory and scout threads, which Niagara chips appear to not do. But if those new technologies do not pan out--and remember, the Rock chips were just pushed out a year to the second half of 2009--do not be at all surprised to see a goosed up Niagara chip suddenly plunked down inside the Supernova server frames. If something is working, you tend to stick with it. Sun ditched the "Millennium" UltraSparc-V designs in 2004 because they were not going to pan out, and switched to goosing the UltraSparc-III by adding cache and making it multicore, and hence the UltraSparc-IV. This would not be the first time such a thing has happened.

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