pSeries Power5 Servers Might Be Announced This Summer

by Timothy Prickett Morgan

IBM this week announced its first Power5-based "Squadron" servers, rolling out an entry and midrange box in its proprietary iSeries line as the new eServer i5 machines. While IBM has been mum about when it will ship the AIX-based eServer p5 variants of these Squadrons, the i5s provide a sneak peek at what the core Power5-AIX boxes, which will also support Linux, will look like.

As readers of this newsletter know, for quite some time we have heard of the Model 520 and Model 570 servers, and that is what the new eServer i5 models are called. IBM has not officially said what it will call its pSeries AIX variants of these machines (eServer p5 seems logical and is already ), and it has similarly not said that it will deliver a Linux-only configuration. But this also seems logical, given IBM's recent big push to have Linux stand beside AIX and OS/400 as a full-fledged operating system. If I were a betting man, I would bet that, eventually, something called the eServer l5 (the "L" is for Linux) will come to market.

The eServer i5 Model 520 can have one or two Power5 processor cores activated, while the Model 570 can have from one to four cores activated. The future 64-way Squadron box (presumably to be called the eServer i5 or p5 Model 590) is not expected until late 2004 or early 2005. While the iSeries line is getting the Squadron platform and its Power5 servers first (mainly because OS/400 already had a machine-independent hardware abstraction layer and support for logical partitions that made snapping in the new "Virtualization Engine" hypervisor a relative snap), it could turn out that the pSeries line gets the big Squadron p5 boxes first when AIX 5L 5.3 is ready, in late September or early October. But the indications are that IBM will try to synch up the announcements, and may even announce the new 64-way boxes in July or August even though AIX 5L 5.3 is not quite cooked.

THE POWER5 CHIP AND SQUADRON SERVERS

Just in case you have missed all of our coverage of the Power5 chip and the future Squadron servers (which used to be known by the code-name "Armada"), here's a recap of the basic feeds and speeds of the Power5 processor. Like the Power4 and Power4+, the Power5 chips have two processor cores. These cores are modified Power4 cores, in that they have had simultaneous hyperthreading support added to them. Hyperthreading is a way of boosting the performance of a processor by making it look like two virtual processors to an operating system. (The S-Star PowerPC processors had hyperthreading, but the Power4s did not.) IBM is offering the Power5 processors in two forms, a single-chip module (SCM) and a multichip module (MCM), just as it did in the Power4 generation. The SCM has a single Power5 chip, which includes 64 KB of L1 cache per core and a shared 1.9 MB L2 cache in between the two cores; the Power5 chip also includes the L3 cache controller. The SCM has a separate set of chips to provide 36 MB of L3 cache for the two Power5 cores to play with, as well as the interconnection electronics that allow many of these chips to be ganged up into MCMs.

In the new eServer i5 server line announced this week, IBM is debuting the Power5 chips running at 1.5 GHz and 1.65 GHz. The entry Squadron box is called the eServer i5 Model 520. It is available in a 4U rack-mounted chassis or in a tower configuration. The basic Model 520 box is a 4U chassis with a single 1.5 GHz Power5 core activated; the 1.9 MB, L2 cache activated; and no L3 cache. The pSeries variants of this box will probably have the L3 cache turned on by default. This server has up to eight hot-plug disk slots (only the first four are activated in base machines), six PCI-X slots, two Gigabit Ethernet ports, and two HSL-2 ports (running 2 GB/sec, twice the bandwidth of the HSL-1 ports used in the prior iSeries machines). The machine also has two Hypervisor Management Console (HMC) ports.

The HMC is the outboard, Linux-based machine that I have been telling you about that is necessary to manage the AIX, OS/400, and Linux on the eServer i5 and p5 machines. As we have been telling you, IBM will be supporting up to 10 logical partitions per processor with the Squadrons, but on the eServer i5 line, it is crimping the partition count on the low end because it reckons customers should allocate a lot of power per partition to run OS/400 (which has been rebranded i5/OS) and its integrated DB2 database and WebSphere middleware. IBM may crimp the partition count at the low end for AIX-based p5 variants, or it may only allow 10 partitions per processor on small machines running Linux, which is a leaner OS than AIX. This HMC will come in a rack-mounted version that costs around $4,000 and a desktop version that will cost around $3,000. It is essentially a baby Linux server that only runs the partitioning manager. The HMC will be able to control the partitions for hundreds of servers, not just one machine, and IBM will be supporting a maximum of 254 partitions per Squadron box.

The eServer i5 Model 570 is the basic building block of a range of machines that will be called the eServer p5 and maybe the eServer l5 that will eventually replace the 16-way pSeries 670 and iSeries Model 870 and the 32-way pSeries 690 and iSeries Model 890 "Regatta-H" servers. But IBM is not quite ready yet, and can only for the moment get a four-way Model 570 out the door, and only supporting i5/OS in the first partition and with i5/OS or Linux in the secondary partitions. This machine is very similar to the Model 520, except two disk slots are sacrificed so an extra Power5 processor card can slip into the box. It's the same 4U chassis with a different cover. IBM says that later this year it will debut a kicker to the current four-way Model 570 that will allow two, three, or four of these machines to be lashed together into a big SMP server spanning from 1 to 16 processors. As I have suspected, the Model 570 has a similar feel to the "Summit" xSeries servers, which use four-way cell boards and sophisticated interconnection technology adapted from the former Sequent unit to create bigger SMP servers. My back-of-the-envelope calculations show that a 16-way machine using 1.65 GHz Power5 cores should have about the same performance (and maybe 5 to 10 percent more) as a current top-end 32-way pSeries 690 and iSeries Model 890 using 1.3 GHz Power4 processors.

The Model 570 has to be configured with at least 2 GB of main memory per CPU card. The models with a single CPU card span up to 32 GB of main memory and up to 278 disk drives (19 TB), just like the Model 520. The Model 570 can house six disk drives inside the 4U chassis. The dual CPU card Model 570s can support up to 64 GB of main memory and up to 39 TB of disk. Both machines support up to 10 logical partitions per activated processor core. This will be very handy for Linux customers who want to consolidate many physical Linux servers onto a single machine, yet be able to bring to bear as many as 16 Power5 processors on a single Linux workload through the dynamic logical partitioning of the Squadron boxes. X86-based servers cannot do this without the addition of third party partitioning software from VMware, a unit of disk maker EMC.