Chip Makers Gang Up for Advanced Processes
January 7, 2008 Timothy Prickett Morgan
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Progressively shrinking the circuitry on chips has provided the world with an enormous improvement in computing power every year, but silicon-based circuits seem to be coming up against the limits of physics. That means no single vendor–with the current exception of Intel with its X64 monopoly–can rely on its own financial position to keep investing in ever-more-clever technologies to make faster chips. So most of the major players are ganging up to collaboratively come up with new chip-making processes. In December, Japanese electronics maker Toshiba said that it would join an alliance of chip and electronic equipment suppliers put together by IBM to work the kinks out of future 32 nanometer chip making techniques based on high-k/metal gate processes that IBM announced early in 2007. Working with Advanced Micro Devices, Chartered Semiconductor Manufacturing, Freescale Semiconductor (the old chip unit of Motorola), Infineon Technologies (the spinout from Siemens), and Samsung Electronics, and Sony, IBM has tweaked the breakthrough high-k/metal gate process it announced a year ago so it can actually get chips based on a 32 nanometer variant of this process, mixed with its existing silicon on insulator (SOI) processes, into the factories by the second half of 2009. IBM and AMD have said previously that they expect to deploy 45 nanometer techniques based on immersion lithography (putting silicon wafers under water to etch them) and ultra-low-K dielectric (which uses air pockets to insulate wires on the chip) into the field by the middle of this year in their chips. Intel started shipping its first 45 nanometer chips, the “Penryn” Xeons, back in early November 2007, and obviously has a tremendous lead on the IBM alliance. If the IBM alliance can deploy 32 nanometer techniques by the second half of 2009, as the December announcement that brought Toshiba into the fold suggests, then the IBM team could get in synch with Intel. Intel demonstrated prototype 32 nanometer chips at its Developer Forum in September 2007, and has said that it will get the process into its factories and deploy chips using it sometime in 2009. Like the IBM team, Intel was prototyping a second generation high-k and metal gate transistor technology. In a related announcement, IBM also said that Chinese chip maker Semiconductor Manufacturing International would license its 45 nanometer chip processes to help it make chips and chipsets for cell phones as well as graphics chips for video cards. SMIC operates two 300mm wafer chip making plants that can deploy the 45 nanometer processes, one in Beijing and the other in Shanghai. RELATED STORIES Intel Announces First “Penryn” Xeon Processors IDF Server Wrap Up: Intel to Keep the Pressure on AMD Intel Details Future 45 Nanometer Chip Plans from Beijing Intel Shows Off Future Penryn and Nehalem Chip Designs Will 45 Nanometer Chips Make Two Warring Camps? IBM, AMD Expect 45-Nanometer Chips in Mid-2008 Intel Previews Quad-Core Chips, Talks Up Massively Cored RISC IBM Research Pushes Chip Tech Down Below 30 Nanometers
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