Keeping i5s Current Means Updating Firmware, Too
November 1, 2004 Timothy Prickett Morgan
I was talking to an iSeries business partner last week who said that while he was away at COMMON, his staff installed something he called “i5/OS V5R3 GA2” on his i5 server. I had never heard of that subrelease designation for OS/400, and when he said that he was concerned that he would have to update all of his customers’ operating systems with this new subrelease, and have to charge them for it, I immediately set to work to figure out what was going on.
I put in a call to Jim Herring, director of product management and business operations in the iSeries Division, and he explained the situation.
First of all, there are no subreleases of i5/OS; if you have i5/OS V5R3 already loaded on your machine, you don’t have to reinstall your operating system. So you can relax.
Back in the old AS/400 days, there were three primary layers to an AS/400. There was the hardware, which consisted of various generations of proprietary, PowerPC, and Power processors. On top of this hardware is a layer of software called the System Licensed Internal Code, or SLIC. Riding above the SLIC is the operating system layer, OS/400. The SLIC software is functionally equivalent to the kernel of a Unix or Linux operating system, in that it controls how the system services that comprise the operating system gain access to hardware features and interact with one another through the hardware. The SLIC layer is also where the Technology Independent Machine Interface (TIMI) is encoded. In effect, TIMI is a hardware abstraction layer that presents a virtualized implementation of AS/400 hardware that OS/400 talks to. Because OS/400, DB2/400, RPG, and COBOL never talk directly to the iron, but only to this intermediate microcode, IBM can radically change the underlying hardware in the box, and as long as the hardware talks to the microcode properly, OS/400, DB2/400, and their related RPG and COBOL applications, will run properly. (This is a bit of an oversimplification, I realize. In truth, these RPG and COBOL applications are compiled to an intermediate level at the SLIC layer and are fully compiled for a specific piece of AS/400 hardware the first time they are executed on these machines. This is all done invisibly, and programmers are not aware of this when they upgrade from, say, an AS/400 to an iSeries.)
Given this architecture, when IBM wanted to change something in the AS/400 software stack, in either the SLIC or the OS/400 layer, the company issued a batch of PTFs or rolled up a new OS/400 version or release (this is common with a significant underlying hardware change).
With the eServer i5 machines, it’s a bit more complex. There is a service processor embedded in the i5 machines (a special processor, possibly a PowerPC card, but definitely running Linux) that monitors the system and its logical partitions and other virtualized features (such as on-demand processors or memory capacity). And there is the Virtualization Engine hypervisor layer, which abstracts the underlying hardware in a Power5-based “Squadron” server, whether it is an eServer i5 or an eServer p5. The i5 and p5 servers also have a Hardware Management Console, which extends outward from the i5 and p5 servers and their service processors to allow system administrators to set up and manage logical partitions. All of these components (the service processor, the Virtualization Engine, and the HMC) consist of another set of microcode that runs on these devices and has to be tweaked from time to time and updated in a manner that is somewhat different from the normal PTF process. This “GA” microcode sits logically beside the SLIC layer but is not part of SLIC itself.
With the i5 announcements in May and shipments in June, IBM shipped what it called GA1 of this collection of microcode for these components. With the launch of the Model 570 machines in July, IBM put out an update of this microcode, GA2, which covered changes to the HMC as well as support for the expanded Model 570 line and the new pricing and processor/5250 activation scheme that began shipping in August. And when the high-end Model 595 starts shipping on November 19, there will be a GA3 update of this firmware.
According to Herring, the updates to the GA microcode slip underneath OS/400 and do not require a reinstallation of the operating system. IBM distributes the microcode on a CD, and all of the GA code can be updated in one fell swoop for the service processor, the Virtualization Engine, and the HMC. Customers can also download the code from IBM’s support Web site and apply it themselves, just as they would with a HIPER PTF.
Although the GA microcode has been tied to specific hardware events (the initial launch, the Model 570 launch, and the Model 595 launch), Herring says, it is important that customers of i5 machines keep this microcode current, even if they are not installing a new piece of hardware, because any tweaks and changes IBM makes to the service processor, the Virtualization Engine, and the HMC will be done in this microcode.