IBM Shoots Down Quad-Core Power5+ Modules for the System i
October 2, 2006 Timothy Prickett Morgan
Several weeks ago, after I became irritated by the relatively poor showing that the System i5 machines using the new Power5+ processors had in the Bang for the Buck series of articles that have been running in The Four Hundred, I wrote a story that basically said that if IBM cannot tune i5/OS and DB2/400 to take advantage of the iron the way it has done for AIX and DB2 UDB, then it should just throw hardware at the problem and move to the quad-core module (QCM) variants of the Power5+ and drop these into the System i5.
This seemed like a perfectly logical thing to me, and as I demonstrated in that article, such a move would go a long way to closing the price/performance gap the System i5 has in the entry and midrange server space compared to Windows, Linux, and Unix alternatives. The reason is simple. With QCMs, IBM crams two dual-core Power5+ chips into the same package where it would normally put one chip, thereby doubling the number of cores in a system and, after overhead is taken into account, delivering between 55 and 65 percent more oomph in the system. If IBM treated each dual-core chip in a QCM-enabled System i5 as a single core (basically, giving i5/OS away for free on every other core), this would do great things for the competitiveness of the i5 line.
When IT Jungle was at the COMMON conference two weeks ago, we asked Jim Herring, director of System i product management and business operations, about the possibility of using QCMs to get competitive, which is why the System p5 servers use them. He was not exactly enthusiastic about the idea.
“System p has made the jump to QCM,” Herring said. “We haven’t yet, because one of the characteristics of our workload on our system is cache. We really need L2 and L3 cache. Part of that is that most of our code runs in true 64-bit fashion. That makes memory addressing huge. To date, QCM technology hasn’t allowed us to have that much cache on the box. That’s one of the areas we are working on and that could be a potential for Power6.”
While we accept that there might be something in the underpinnings of i5/OS V5R4 that requires more cache than AIX 5.3, both operating systems are marketed as 64-bit platforms. Similarly, DB2/400, which is embedded in i5/OS, and DB2 UDB and Oracle 10g, which are the dominant databases on Unix platforms (including AIX), are all 64-bit databases. IBM runs its rPerf benchmark, which is a variant of the TPC-C test, on all machines, including QCMs, and shows good scalability. Presumably, IBM is running all of this code in its tests–the operating system, the database, and the rPerf code–in 64-bit mode.
It is possible that something in the i5/OS-DB2/400 combo–something in the way chips address the memory space where i5/OS objects play–limits the usefulness of QCMs. Whatever that limit is, it should be fixed. That much we know for sure. Something has to give to make the System i5 more competitive, and we can’t wait until 2007 or 2008 for it to start happening. If allowing customers to run 48-bit mode RPG and COBOL applications on the box will boost performance–as can happen when 32-bit code is compiled in 32-bit mode on 64-bit processors–then perhaps that is worth examining, too. If being a “true 64-bit” platform means doing a lot less work than a “quasi 64-bit” platform, if this is indeed what IBM is talking about, then maybe being a true 64-bit platform is not what it is cracked up to be.
This story is not done yet. I still don’t quite understand the explanations I have been getting from IBM.