NEC Teams Up with IBM and Partners on Chip Fabrication Tech
September 22, 2008 Timothy Prickett Morgan
The electronics division of Japanese tech conglomerate NEC has joined up with IBM and its chip partners in New York state, known as the Fishkill Alliance, to work on perfecting 32 nanometer chip-making processes.
IBM and its partners, which includes Chartered Semiconductor, Freescale Semiconductor, Infineon Technologies, Samsung Electronics, STMicroelectronics, and Toshiba, are working through the alliance to perfect the high-k/metal gate process technologies that will be deployed using 32 nanometer etching equipment. IBM’s current Power6 chips use 65 nanometer processes, and Big Blue is getting set to ramp up the water-immersion 45 nanometer processes, possibly for a Power6+ bump in 2009 as a prelude to the use of this process in the eight-core Power7 processors, due in 2010. (IBM has been vague about the processes and core count in the Power7, but the Ross Mauri, general manager of the Power Systems division, confirmed in a Q&A that ran in July in this newsletter in August that Power7 will indeed have a maximum of eight cores.
Anyway, each successive generation of chip processes requires more clever engineering and physics, and this gets increasingly expensive, which is why former competitors have no choice but to cooperate on creating the processes that will keep chips on the Moore’s Law curve.
NEC is not only bringing its 45 nanometer and 32 nanometer work to the table now that it has joined the alliance, but is also working with Big Blue and the alliance partners it has rounded up to get cracking on 22 nanometer processes, which are expected sometime in 2011, and 15 nanometer processes, which are even further out. All of this work is being focused at the Albany NanoTech center, which is operated by the College of Nanoscale Science and Engineering at the University of Albany, the campus of the State University of New York (SUNY) devoted to engineering.