The Path Truly Opens To Alternate Power CPUs, But Is It Enough?
July 14, 2020 Timothy Prickett Morgan
If you have a few tens of millions of dollars to spare and you want to set up a foundry partnership with either Globalfoundries for 14 nanometer chip making technologies or with Samsung for 7 nanometer technologies and then create your own Power processor, things just got a little bit easier. Big Blue has open sourced one of its Power cores through the OpenPower foundation and now anybody and everybody can grab it and design a new central processing unit around that core.
Don’t get too excited, but get a little excited. Let me explain.
We still believe in the idea that anything that makes Power chips stronger allows for the IBM i platform to live longer, so the opening up of the Power instruction set last August and now the opening up of the Power-A2 core used in IBM’s Wire Speed Processor and its BlueGene/Q massively parallel supercomputers takes it another step. Back in early June, in my other day job over at The Next Platform, I spoke to the new executive director of the OpenPower Foundation, James Kulina, about the prospect of open sourcing Power cores to help jump start innovation and treating OpenPower more like a software project, among other topics of conversation, and two weeks ago, just before IT Jungle went on hiatus for the July 4th holiday, I also spoke to Mendy Furmanek, president of the OpenPower Foundation who is also in charge of Power processor verification and open hardware business development at IBM, about the opening up of the Power-A2 core that had just happened. I am not going to repeat all of that work again here, but I do want to bring some insight to the Power-A2 core being opened up and what it might mean – and what it probably does not mean – for IBM i shops.
The first thing to note is that IBM did not open source the cores used in the Power7, Power7+, Power8, and Power9 processors – and it probably is not going to open source the cores used in the future Power10 chip, either. That is a little too close to the bank account for Big Blue. But I have said in the past and I will say it again that perhaps the Power10 chip, in its entirety, should be the last one that IBM develops by itself and that the future Power11 processor should be specified, developed, and manufactured by the OpenPower collective. IBM is great at creating the processors that customers of its big iron machines need and it is doing a better job of making processors well suited to the entry server market and for clustered systems, but there are other variations that are needed for niche markets in edge computing and lower-cost computing for SMBs. And as I have said before, most IBM i shops in particular need a chip that has only a few cores and lots of clocks and cache so it can rip through batch jobs and high availability replication work and Java and Python applications like grit through a goose.
Yes, many of these applications have been threaded, and yes, more threads at much lower clocks and yield much better performance per watt. But someone putting a server in a closet and spending a few hundred bucks a year powering it doesn’t give a damn about dollars per performance per watt. Yes, this really matters when you are running a few million servers across a few dozen regions with several dozens of datacenters. But what matters most to most IBM i shops is wall time to complete work. If you can make batch jobs at SMBs run twice as fast or four times as fast, then you should. And I am not talking about creating an expensive chip where all but one or two of the dozen or two dozen cores are turned off because that is still a big expensive chip with low yields in the first place. I am talking about making a chip specifically for IBM i.
And as it turns out, the Power-A2 chip does not have speculative execution, so it is not susceptible to side channel security attacks and it is an in-order processor that has a lot of ways to hook accelerators into it. And it supports special PowerPC-AS memory tagging methods that IBM i requires to create single level storage. This is a very cool thing. Of course, should such a chip be manufactured, getting Big Blue to license IBM i for it would be possibly problematic. It’s hard to say.
With Big Blue controlling the source code to both AIX and IBM i, it holds all of the cards here. There is some comfort in that in the event that IBM decides to stop making Power Systems hardware that supports AIX or IBM i that others could now pick up the ISA and cores and weave a new chip to run it. But they would have to either create a clone of Power7, Power8, or Power9 to run IBM’s operating systems or have access to the source code to make the tweaks necessary to the operating system kernel and driver stack to make AIX or IBM i run on this new chip. You could create an emulation layer, with say a Power6 runtime environment supporting an old IBM i release like OS/400 V6R1. But this is not ideal, and has some obvious limitations. There is always the possibility of running IBM i atop the PowerVM hypervisor and using that as some kind of emulation environment, but IBM, again, holds all of the cards.
This is why the Power hardware and the IBM i and AIX software both need to be open source. If IBM has caught the open source religion with the acquisition of Red Hat, the situation sort of requires it. And that means truly trusting the open source philosophy, all the way. The question is will competitors take an open IBM i and AIX and an open Power chip and create competitive boxes, or will IBM still be the dominant supplier? Red Hat is still the only $3 billion open source company, and it argues that enterprises will pay for support for enterprise-grade software that is worth the money.
With IBM i and AIX software open and the possibility of Power hardware also being open, and both tuned for specific workloads and specific customers, there is a chance to radically change the business model for the Power Systems platform and to tell a consistent story across AIX, IBM i, and Linux. It’s something to think about.