IBM To Divulge Power8 Processor Secrets At Hot Chips
August 26, 2013 Timothy Prickett Morgan
It is late on a Friday night after a hard week, and I have to be up at some awful hour to catch a plane at JFK to get myself to San Francisco in the morning. (The flight boards at 6:20 a.m. for a 7 a.m. takeoff, and I would be lying if I said that Delta Flight DL629 was not a little familiar to me after a few years.) But I don’t care about all that, and I don’t care about being tired because if there is one thing I love, it is going to Hot Chips once a year to see all the new server processors.
This time around, Jeff Stuecheli, a hardware architect in IBM’s Power chip design lab in Austin, Texas, will be trotting out the design of the forthcoming Power8 processor, which is relevant to IBM i shops both large and small. The Hot Chips abstract doesn’t reveal much about the chip, and in fact it just says “Next Generation Power microprocessor” for the agenda item on Monday. But I confirmed with Brad McCredie, chief technology officer for IBM’s Systems and Technology Group, when the OpenPower consortium was launched two weeks ago that the presentation would indeed be on the Power8 chip.
IBM’s latest Power chip roadmap.
I haven’t seen an updated Power processor roadmap in close to two years, and the one above is the most current one I can get my hands on. (If you have something better, please send it.) What I can tell you about the Power8 chip is this. First, IBM is skipping a shrink from the current 32 nanometer processes used to etch its chips to a 28 nanometer process and going right straight to 22 nanometers. This is a pretty big jump–the same that Intel has made with its Xeon processors–and that gives Big Blue lots of options. The roadmap above show Power8 having more cores, larger caches, more accelerators than the Power7 and Power7+ chips, and a fourth generation of the company’s simultaneous multithreading (SMT). That could mean more threads per core (maybe six, maybe even eight) or it could just mean improvements in the way the four-threaded cores work.
It is not clear how many cores IBM can or will put on the Power8 chip. The shrink from the 45 nanometer processes used with Power7 to the 22 nanometer processes used for Power8 should allow for as many as 16 cores to be on a single Power8 chip–depending on the cache size and desired clock speed. If IBM wants more than 10 MB of L3 cache per core, it will have to sacrifice core real estate on the die. As I have said before, IBM could try to crank clocks a little more and then cut back to a dozen cores and fatter caches, depending on how it thinks the typical AIX and IBM i workload will make use of the cores. A Power8 system should offer roughly twice the oomph of a Power7 machine in the same class, socket for socket, if history is any guide.
That Power8 socket will probably be different, given that McCredie told me that IBM is not going to have GX++ ports in the Power8 chips. These ports, which are a modified version of 20Gb/sec InfiniBand, are used to link remote I/O drawers directly into the processor complex. The GX++ bus will be replaced by the Coherently Allocated Processor Interface, or CAPI, which is an overlay for the on-chip PCI-Express 3.0 bus that will provide coherent memory addressing for CPUs and external coprocessors like Tesla GPU coprocessors from Nvidia. The on-chip PCI-Express 3.0 controllers will bring IBM’s Power line to parity with Intel‘s Xeon E5 processors and Oracle‘s Sparc T5 chips. Both have two PCI-Express controllers on the die, and IBM could add an even larger number.
The one thing I hope IBM does is use some of that 22 nanometer shrink to get the thermals of the Power8 chip down. IBM has been kissing 200 watts of heat dissipation for the last several generations of Power chips (if you believe the rumors, since Big Blue doesn’t publish thermal design points), and to compete better with X86 processors, IBM needs to bring down the heat as well as cranking up the performance.
Whatever IBM does and whatever Power8 is, I will tell you all about it. Count on that.