Intel’s Xeon E7 Brings The Fight To IBM’s Power8
February 24, 2014 Timothy Prickett Morgan
Sales of RISC and Itanium processors running Unix or proprietary operating systems such as IBM i, OpenVMS, NonStop, and others have been taking it on the chin in recent quarters, and with these businesses down, Intel has wound up a haymaker that puts even more pressure on these platforms. It is called the Xeon E7 v2, and an update of the Power processor can’t get here soon enough.
Code-named “Ivy Bridge-EX,” the new chip from Intel is aimed predominantly at machines with four sockets or more, but there are also variants available for two-socket machines and both Silicon Graphics and Hewlett-Packard are working on their own extended chipsets to glue more nodes together than can be done with the stock “Patsburg” C602J chipset from Intel. And, by the way, if you really wanted to, you could create a single-socket server using one of these chips, but it would be a very expensive thing to do. The Xeon E7 v2 chip is implemented in Intel’s 22 nanometer processes, and sports 4.3 billion transistors and plugs into the same LGA2011, or Socket R1, sockets as the Xeon E5 chips aimed at two socket servers. The Xeon E5s were updated last September with the Ivy Bridge cores, and now the bigger and badder boxes are getting the Ivy Bridge update.
As you well know, I have multiple jobs out there on the Internet, and I have done a detailed analysis of the new Xeon E7 v2 processors over at EnterpriseTech. I go through all of the feeds and speeds, slots and watts, and such, as you would expect. Here in The Four Hundred I want to stick to the matters that are important to IBM i shops. Namely, how these machines compare to the current Power7+ machines and how they might stack up to the Power8 boxes.
At the moment, the Power7+ chips are available with four, six, or eight cores running at between 3.1 GHz and 4.4 GHz, depending on the model of Power Systems you are talking about. IBM packs four threads per core, 10 MB of L3 cache per core. These chips are implemented in a 32 nanometer process. With the Power8 chips, which I detailed last week and which are due sometime around the middle of this year, IBM will shift to a maximum of a dozen cores and drop the L3 cache back to 8 MB per core. It will be using a 22 nanometer process and have 4.2 billion transistors on the die. It looks like clock speeds can range from 2.5 GHz to 5.5 GHz, give or take. The Power8 will have integrated PCI-Express controllers and will support up to 1 TB of memory per socket using 32 GB memory sticks.
A Power instruction is not equivalent to a Xeon instruction, of course, so you have to be careful about making comparisons. Intel was expecting to do a “Sandy Bridge-EX” variant of the Xeon E7 in late 2012, perhaps with a dozen cores. But Intel spiked that 32 nanometer chip and decided to wait and move to the Ivy Bridge cores for the next Xeon E7. The Sandy Bridge-EX was expected to have a shared socket with Itanium, but that project was spiked and Intel instead created a version of the Xeon E7 that used the same socket as the Xeon E5 chips to make life easier on server makers. The Xeon E7 delay probably gave all of the RISC system vendors some breathing room as well as doing the same for HP’s Itanium platforms. There are 20 different versions of the Xeon E7 chips, which have six, eight, 10, 12, or 15 cores with two threads per core with HyperThreading turned on. Clock speeds range from a low of 1.6 GHz to a high of 3.4 GHz. The L3 cache tops out at 37.5 MB, or 2.5 MB per core. Intel has created versions aimed specifically at missing critical and database workloads that have lower core counts and higher clock speeds as well as a variant aimed at supercomputer clusters that has a lower price than you might expect.
The important thing is that Intel is moving from 32 nanometer to 22 nanometer processes and is increasing the core count by 50 percent and the memory capacity by a factor of three with the Xeon E7 v2 processors. Intel boosted memory slots by 50 percent to a total of 24 per socket and then boosted the memory stick size to 64 GB to field a total of 6 TB for a four-socket machine and 12 TB for an eight socket machine. The C602J chipset allows for four-way or eight-way machines to be created without any additional chipset engineering. Add it all up, and the typical workload is running about twice as fast on the new Xeon E7 v2 machines as they did on a Xeon E7 v1 box with the same number of sockets. The microarchitecture changes are a chunk of that performance improvement, a big piece is just having more cores, and the remainder is a slew of other changes, such as radically increasing the L3 cache bandwidth and memory capacity.
Most vendors are only previewing their Xeon E7 v2 systems at the moment and are not expected to start shipping boxes for a month or two. But Intel ginned up some configurations and pricing that pit a four-socket machines using Power7+ and Xeon E7 v2 motors against each other:
To make this comparison, Intel took a SPECint_rate_base2006 integer benchmark test run on a four-socket Flex p460 node with eight-core Power7+ chips running at 4.1 GHz. This server was rated at 1,230 on the SPEC test. With 256 GB of memory and two disk drives plus AIX 7.1 and the PowerVM hypervisor, Intel says this machine costs $177,290.
The Intel machine is a four-socket box as well, and it is equipped with the E7-4890 v2 chip, which is the top SKU for four-socket servers that has 15 cores and runs at 2.8 GHz. Intel estimates that this system will do around 2,238 on the SPEC test, and calculates further than based on pricing from an unnamed server partner–very likely not IBM–this machine will cost $46,500 with 256 GB of memory and two disks plus Red Hat Enterprise Linux 6.3 and its companion KVM hypervisor. That is basically twice the performance for less than a third of the price.
Of course, Moore’s Law goes on for the rest of the industry, and the Power8 chip is not exactly a wimp. With a Power7+ baseline at a 4 GHz clock speed, a Power8 chip with a dozen cores is expected to do about 2.2 times as much work as that Power7+ at the same 4 GHz clock speed. So that would give a future four-socket Power8 system a rating of around 2,700 on the SPEC integer test. If IBM can boost the clock speed up to 5 GHz on its top-bin part, then this hypothetical quad-socket Power8 machine could do somewhere around 3,400 on the SPEC integer test. That will give IBM a 50 percent performance advantage. At list pricing, IBM has to discount by more than half to get close on the AIX systems. IBM won’t cut prices for AIX or IBM systems, but I do expect it to do so with PowerLinux variants.
You can bet Ginny Rometty’s last dollar on that. And to be clear, a four-socket machine has to cost around $70,000 if those numbers on system prices cited by Intel are accurate. (I will do my own comparisons once machines are out there.)
As for IBM i and AIX customers, I find it hard to believe that IBM will cut hardware or software costs by much to compete with Intel at the high end of the server space–and that will not be a good thing for its long-term prospects for Power. IBM wants to have the Power-Linux combination compete against Intel and it knows that AIX and IBM i shops will endure a certain amount of economic pain to keep their existing platforms. This is ever the way in the IT racket, as AS/400 customers remember well when they paid a premium for hardware and software so Big Blue could afford to crush HP and Sun Microsystems in the Unix server space. Now AIX shops are helping to make PowerLinux machines cheaper.
Not much fun, is it AIX brothers?